1778 #define XM_IN16(IoC, Mac, Reg, pVal)					\  argument
1779 	SK_IN16((IoC), XMA((Mac), (Reg)), (pVal))
1784 #define XM_IN32(IoC, Mac, Reg, pVal) {					\  argument
1786 		(SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_LO]);		\
1788 		(SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_HI]);		\
1798 #define XM_INADDR(IoC, Mac, Reg, pVal) {				\  argument
1801 	pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0];				\
1813 #define XM_OUTADDR(IoC, Mac, Reg, pVal) {				\  argument
1815 	pByte = (SK_U8 SK_FAR *)&((SK_U8 SK_FAR *)(pVal))[0];	\
1827 #define XM_INHASH(IoC, Mac, Reg, pVal) {				\  argument
1830 	pByte = (SK_U8 SK_FAR *)&((SK_U8 SK_FAR *)(pVal))[0];	\
1845 #define XM_OUTHASH(IoC, Mac, Reg, pVal) {				\  argument
1847 	pByte = (SK_U8 SK_FAR *)&((SK_U8 SK_FAR *)(pVal))[0];	\
1886 #define GM_IN16(IoC, Mac, Reg, pVal)					\  argument
1887 	SK_IN16((IoC), GMA((Mac), (Reg)), (pVal))
1892 #define GM_IN32(IoC, Mac, Reg, pVal) {					\  argument
1894 		(SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_LO]);		\
1896 		(SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_HI]);		\
1904 #define GM_INADDR(IoC, Mac, Reg, pVal) {				\  argument
1907 	pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0];				\
1919 #define GM_OUTADDR(IoC, Mac, Reg, pVal) {				\  argument
1921 	pByte = (SK_U8 SK_FAR *)&((SK_U8 SK_FAR *)(pVal))[0];	\
1933 #define GM_INHASH(IoC, Mac, Reg, pVal) {				\  argument
1936 	pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0];				\
1951 #define GM_OUTHASH(IoC, Mac, Reg, pVal) {				\  argument
1953 	pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0];				\
2014 #define PHY_READ(IoC, pPort, Mac, PhyReg, pVal) {						\  argument
2018 	XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));							\
2023 		XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));						\
2027 #define PHY_READ(IoC, pPort, Mac, PhyReg, pVal) {						\  argument
2032 	XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));							\
2044 		XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));						\