1778 #define XM_IN16(IoC, Mac, Reg, pVal)					\  argument
1779 	SK_IN16((IoC), XMA((Mac), (Reg)), (pVal))
1781 #define XM_OUT16(IoC, Mac, Reg, Val)					\  argument
1782 	SK_OUT16((IoC), XMA((Mac), (Reg)), (Val))
1784 #define XM_IN32(IoC, Mac, Reg, pVal) {					\  argument
1785 	SK_IN16((IoC), XMA((Mac), (Reg)),					\
1787 	SK_IN16((IoC), XMA((Mac), (Reg+2)),					\
1791 #define XM_OUT32(IoC, Mac, Reg, Val) {										\  argument
1792 	SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16)((Val) & 0xffffL));			\
1793 	SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16)(((Val) >> 16) & 0xffffL));\
1798 #define XM_INADDR(IoC, Mac, Reg, pVal) {				\  argument
1802 	SK_IN16((IoC), XMA((Mac), (Reg)), &Word);			\
1805 	SK_IN16((IoC), XMA((Mac), (Reg+2)), &Word);			\
1808 	SK_IN16((IoC), XMA((Mac), (Reg+4)), &Word);			\
1813 #define XM_OUTADDR(IoC, Mac, Reg, pVal) {				\  argument
1816 	SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16)			\
1819 	SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16)		\
1822 	SK_OUT16((IoC), XMA((Mac), (Reg+4)), (SK_U16)		\
1827 #define XM_INHASH(IoC, Mac, Reg, pVal) {				\  argument
1831 	SK_IN16((IoC), XMA((Mac), (Reg)), &Word);			\
1834 	SK_IN16((IoC), XMA((Mac), (Reg+2)), &Word);			\
1837 	SK_IN16((IoC), XMA((Mac), (Reg+4)), &Word);			\
1840 	SK_IN16((IoC), XMA((Mac), (Reg+6)), &Word);			\
1845 #define XM_OUTHASH(IoC, Mac, Reg, pVal) {				\  argument
1848 	SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16)			\
1851 	SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16)		\
1854 	SK_OUT16((IoC), XMA((Mac), (Reg+4)), (SK_U16)		\
1857 	SK_OUT16((IoC), XMA((Mac), (Reg+6)), (SK_U16)		\
1886 #define GM_IN16(IoC, Mac, Reg, pVal)					\  argument
1887 	SK_IN16((IoC), GMA((Mac), (Reg)), (pVal))
1889 #define GM_OUT16(IoC, Mac, Reg, Val)					\  argument
1890 	SK_OUT16((IoC), GMA((Mac), (Reg)), (Val))
1892 #define GM_IN32(IoC, Mac, Reg, pVal) {					\  argument
1893 	SK_IN16((IoC), GMA((Mac), (Reg)),					\
1895 	SK_IN16((IoC), GMA((Mac), (Reg+4)),					\
1899 #define GM_OUT32(IoC, Mac, Reg, Val) {										\  argument
1900 	SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16)((Val) & 0xffffL));			\
1901 	SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16)(((Val) >> 16) & 0xffffL));\
1904 #define GM_INADDR(IoC, Mac, Reg, pVal) {				\  argument
1908 	SK_IN16((IoC), GMA((Mac), (Reg)), &Word);			\
1911 	SK_IN16((IoC), GMA((Mac), (Reg+4)), &Word);			\
1914 	SK_IN16((IoC), GMA((Mac), (Reg+8)), &Word);			\
1919 #define GM_OUTADDR(IoC, Mac, Reg, pVal) {				\  argument
1922 	SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16)			\
1925 	SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16)		\
1928 	SK_OUT16((IoC), GMA((Mac), (Reg+8)), (SK_U16)		\
1933 #define GM_INHASH(IoC, Mac, Reg, pVal) {				\  argument
1937 	SK_IN16((IoC), GMA((Mac), (Reg)), &Word);			\
1940 	SK_IN16((IoC), GMA((Mac), (Reg+4)), &Word);			\
1943 	SK_IN16((IoC), GMA((Mac), (Reg+8)), &Word);			\
1946 	SK_IN16((IoC), GMA((Mac), (Reg+12)), &Word);		\
1951 #define GM_OUTHASH(IoC, Mac, Reg, pVal) {				\  argument
1954 	SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16)			\
1957 	SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16)		\
1960 	SK_OUT16((IoC), GMA((Mac), (Reg+8)), (SK_U16)		\
1963 	SK_OUT16((IoC), GMA((Mac), (Reg+12)), (SK_U16)		\
2014 #define PHY_READ(IoC, pPort, Mac, PhyReg, pVal) {						\  argument
2017 	XM_OUT16((IoC), (Mac), XM_PHY_ADDR, (PhyReg) | (pPort)->PhyAddr);	\
2018 	XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));							\
2021 			XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu);					\
2023 		XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));						\
2027 #define PHY_READ(IoC, pPort, Mac, PhyReg, pVal) {						\  argument
2031 	XM_OUT16((IoC), (Mac), XM_PHY_ADDR, (PhyReg) | (pPort)->PhyAddr);	\
2032 	XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));							\
2035 			XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu);					\
2044 		XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));						\
2049 #define PHY_WRITE(IoC, pPort, Mac, PhyReg, Val) {						\  argument
2054 			XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu);					\
2057 	XM_OUT16((IoC), (Mac), XM_PHY_ADDR, (PhyReg) | (pPort)->PhyAddr);	\
2058 	XM_OUT16((IoC), (Mac), XM_PHY_DATA, (Val));							\
2061 			XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu);					\
2111 #define SK_HWAC_LINK_LED(pAC, IoC, Port, Mode) \  argument
2112 	SK_OUT8(IoC, MR_ADDR(Port, LNK_LED_REG), Mode);