Lines Matching refs:BIT_6S
74 #define BIT_6S (1 << 6) macro
179 #define PCI_PERREN BIT_6S /* Parity Report Response enable */
202 #define PCI_UDF BIT_6S /* User Defined Features */
812 #define CS_CL_SW_IRQ BIT_6S /* Clear IRQ SW Request */
966 #define TST_FRC_DPERR_MW BIT_6S /* force DATAPERR on MST WR */
1085 #define MA_DIS_REC_TX2 BIT_6S /* Disable Recovery Timer TX2 */
1103 #define PA_DIS_TO_TX1 BIT_6S /* Disable Timeout Timer TX1 */
1128 #define RX2_T_ON BIT_6S /* RX2 Timeout/Recv Timer Test On */
1147 #define TXA_DIS_FSYNC BIT_6S /* Disable force of sync Tx queue */
1284 #define RB_WP_T_ON BIT_6S /* Write Pointer Test On */
1327 #define MFF_DIS_PAUSE BIT_6S /* Disable Pause Signaling */
1347 #define MFF_DIS_W4E BIT_6S /* Disable Wait for Empty */
1360 #define MFF_WSP_T_ON BIT_6S /* Tx: Write Shadow Ptr TestOn */
1371 #define MFF_WP_T_ON BIT_6S /* Write Pointer Test On */
1569 #define WOL_CTL_DIS_PME_ON_PATTERN BIT_6S