Lines Matching refs:BIT_5
58 #define BIT_5 (1L << 5) macro
294 #define PCI_EXT_PATCH_1 BIT_5
828 #define PC_VCC_ENA BIT_5 /* Switch VCC Enable */
872 #define IS_XS2_B BIT_5 /* Q_XS2 End of Buffer */
894 #define IS_RAM_RD_PAR BIT_5 /* RAM Read Parity Error */
999 #define GP_IO_5 BIT_5 /* IO_5 pin */
1199 #define CSR_STOP BIT_5 /* Stop Rx/Tx Queue */
1248 #define T2_BC_T_ON BIT_5 /* Byte Counter Test Mode on */
1444 #define GMF_CLI_RX_FO BIT_5 /* Clear IRQ Rx FIFO Overrun */
1458 #define GMF_CLI_TX_FC BIT_5 /* Clear IRQ Tx Frame Complete */
1477 #define GMC_F_LOOPB_ON BIT_5 /* FIFO Loopback On */
1541 #define GM_IS_TX_CO_OV BIT_5 /* Transmit Counter Overflow IRQ */