Lines Matching refs:BIT_2S

78 #define BIT_2S		(1 << 2)  macro
183 #define PCI_BMEN		BIT_2S		/* Bus Master enable */
816 #define CS_MRST_SET		BIT_2S		/* Set Master reset	*/
929 #define LD_T_OFF		BIT_2S	/* Loader Test mode off */
939 #define TIM_START		BIT_2S	/* Start Timer */
947 #define TIM_T_ON		BIT_2S	/* Test mode on */
970 #define TST_FRC_APERR_T		BIT_2S	/* force ADDRPERR on TRG */
978 #define TST_FRC_DPERR_MW64	BIT_2S	/* DataPERR WR 64	*/
1029 #define I2C_DATA_DIR	BIT_2S		/* direction of I2C_DATA */
1049 #define BSC_T_ON	BIT_2S		/* Test mode on */
1070 #define RI_T_ON			BIT_2S	/* Timeout Timer Test On */
1078 #define MA_FOE_OFF		BIT_2S	/* XMAC Fast Output Enable OFF */
1089 #define MA_DIS_REC_RX2	BIT_2S	/* Disable Recovery Timer RX2 */
1107 #define PA_DIS_TO_RX1	BIT_2S	/* Disable Timeout Timer RX1 */
1132 #define RX1_T_ON	BIT_2S		/* RX1 Timeout/Recv Timer Test On */
1151 #define TXA_STOP_RC		BIT_2S	/* Stop  sync Rate Control */
1160 #define TXA_LIM_T_ON	BIT_2S	/* Tx Arb Limit Timer Test On */
1239 #define SM_TEST_ON		BIT_2S	/* Switch on SM Test Mode */
1278 #define RB_PC_T_ON		BIT_2S	/* Packet Counter Test On */
1288 #define RB_RP_T_ON		BIT_2S	/* Read Pointer Test On */
1297 #define RB_DIS_OP_MD	BIT_2S	/* Disable Operation Mode */
1331 #define MFF_DIS_TIST	BIT_2S		/* Disable Time Stamp Gener */
1351 #define MFF_DIS_LOOPB	BIT_2S		/* Disable Loopback */
1364 #define MFF_PC_T_ON		BIT_2S	/* Packet Counter Test On */
1375 #define MFF_RP_T_ON		BIT_2S	/* Read Pointer Test On */
1383 #define MFF_DIS_OP_MD	BIT_2S	/* Disable Operation Mode */
1394 #define LED_START		BIT_2S	/* Start Timer */
1403 #define LED_T_ON		BIT_2S	/* LED Counter Test mode On */
1412 #define LED_SYNC_OFF	BIT_2S	/* Disable Sync Wire Input */
1469 #define GMT_ST_START	BIT_2S		/* Start Time Stamp Timer */
1574 #define WOL_CTL_DIS_MAGIC_PKT_UNIT		BIT_2S