Lines Matching refs:BIT_0S
80 #define BIT_0S 1 macro
185 #define PCI_IOEN BIT_0S /* I/O Space Access enable */
818 #define CS_RST_SET BIT_0S /* Set Software reset */
823 #define LED_STAT_OFF BIT_0S /* Status LED off */
909 #define CFG_SNG_MAC BIT_0S /* MAC Config: 0=2 MACs / 1=1 MAC*/
931 #define LD_START BIT_0S /* Start loading FPROM */
941 #define TIM_CLR_IRQ BIT_0S /* Clear Timer IRQ (!IRQM) */
949 #define TIM_T_STEP BIT_0S /* Test step */
959 #define DPT_STOP BIT_0S /* Stop Descriptor Poll Timer */
972 #define TST_CFG_WRITE_OFF BIT_0S /* Disable Config Reg WR */
980 #define TST_FRC_APERR_2M64 BIT_0S /* AddrPERR on 2. phase */
1031 #define I2C_CLK BIT_0S /* I2C Clock Port */
1042 #define BSC_STOP BIT_0S /* Stop Blink Source Counter */
1046 #define BSC_SRC BIT_0S /* Blink Source, 0=Off / 1=On */
1051 #define BSC_T_STEP BIT_0S /* Test step */
1065 #define RI_RST_SET BIT_0S /* Set RAM Interface Reset */
1072 #define RI_T_STEP BIT_0S /* Timeout Timer Step */
1080 #define MA_RST_SET BIT_0S /* Set MAC Arbiter Reset */
1091 #define MA_DIS_REC_RX1 BIT_0S /* Disable Recovery Timer RX1 */
1109 #define PA_RST_SET BIT_0S /* Set MAC Arbiter Reset */
1134 #define RX1_T_STEP BIT_0S /* RX1 Timeout/Recv Timer Step */
1153 #define TXA_DIS_ARB BIT_0S /* Disable Tx Arbiter */
1162 #define TXA_LIM_T_STEP BIT_0S /* Tx Arb Limit Timer Step */
1166 #define TXA_PRIO_XS BIT_0S /* sync queue has prio to send */
1241 #define SM_STEP BIT_0S /* Step the State Machine */
1280 #define RB_PC_INC BIT_0S /* Packet Counter Increm */
1290 #define RB_RP_DEC BIT_0S /* Read Pointer Decrement */
1299 #define RB_RST_SET BIT_0S /* Set RAM Buf STM Reset */
1333 #define MFF_CLR_INSTAT BIT_0S /* Clear IRQ No Status */
1353 #define MFF_SET_MAC_RST BIT_0S /* Set XMAC Reset */
1366 #define MFF_PC_INC BIT_0S /* Packet Counter Increment */
1377 #define MFF_RP_DEC BIT_0S /* Read Pointer Decrement */
1385 #define MFF_RST_SET BIT_0S /* Set MAC FIFO Reset */
1396 #define LED_STATE BIT_0S /* Rx/Tx: LED State, 1=LED on */
1397 #define LED_CLR_IRQ BIT_0S /* Lnk: Clear Link IRQ */
1405 #define LED_T_STEP BIT_0S /* LED Counter Step */
1414 #define LED_OFF BIT_0S /* switch LED off */
1471 #define GMT_ST_CLR_IRQ BIT_0S /* Clear Time Stamp Timer IRQ */
1554 #define GMLC_RST_SET BIT_0S /* Set GMAC Link Reset */
1576 #define WOL_CTL_DIS_PATTERN_UNIT BIT_0S