Lines Matching refs:cfblk
3398 struct i82593_conf_block cfblk; local
3409 memset(&cfblk, 0x00, sizeof(struct i82593_conf_block));
3410 cfblk.d6mod = FALSE; /* Run in i82593 advanced mode */
3411 cfblk.fifo_limit = 5; /* = 56 B rx and 40 B tx fifo thresholds */
3412 cfblk.forgnesi = FALSE; /* 0=82C501, 1=AMD7992B compatibility */
3413 cfblk.fifo_32 = 1;
3414 cfblk.throttle_enb = FALSE;
3415 cfblk.contin = TRUE; /* enable continuous mode */
3416 cfblk.cntrxint = FALSE; /* enable continuous mode receive interrupts */
3417 cfblk.addr_len = WAVELAN_ADDR_SIZE;
3418 cfblk.acloc = TRUE; /* Disable source addr insertion by i82593 */
3419 cfblk.preamb_len = 0; /* 2 bytes preamble (SFD) */
3420 cfblk.loopback = FALSE;
3421 cfblk.lin_prio = 0; /* conform to 802.3 backoff algoritm */
3422 cfblk.exp_prio = 5; /* conform to 802.3 backoff algoritm */
3423 cfblk.bof_met = 1; /* conform to 802.3 backoff algoritm */
3424 cfblk.ifrm_spc = 0x20; /* 32 bit times interframe spacing */
3425 cfblk.slottim_low = 0x20; /* 32 bit times slot time */
3426 cfblk.slottim_hi = 0x0;
3427 cfblk.max_retr = 15;
3428 cfblk.prmisc = ((lp->promiscuous) ? TRUE: FALSE); /* Promiscuous mode */
3429 cfblk.bc_dis = FALSE; /* Enable broadcast reception */
3430 cfblk.crs_1 = TRUE; /* Transmit without carrier sense */
3431 cfblk.nocrc_ins = FALSE; /* i82593 generates CRC */
3432 cfblk.crc_1632 = FALSE; /* 32-bit Autodin-II CRC */
3433 cfblk.crs_cdt = FALSE; /* CD not to be interpreted as CS */
3434 cfblk.cs_filter = 0; /* CS is recognized immediately */
3435 cfblk.crs_src = FALSE; /* External carrier sense */
3436 cfblk.cd_filter = 0; /* CD is recognized immediately */
3437 cfblk.min_fr_len = ETH_ZLEN >> 2; /* Minimum frame length 64 bytes */
3438 cfblk.lng_typ = FALSE; /* Length field > 1500 = type field */
3439 cfblk.lng_fld = TRUE; /* Disable 802.3 length field check */
3440 cfblk.rxcrc_xf = TRUE; /* Don't transfer CRC to memory */
3441 cfblk.artx = TRUE; /* Disable automatic retransmission */
3442 cfblk.sarec = TRUE; /* Disable source addr trig of CD */
3443 cfblk.tx_jabber = TRUE; /* Disable jabber jam sequence */
3444 cfblk.hash_1 = FALSE; /* Use bits 0-5 in mc address hash */
3445 cfblk.lbpkpol = TRUE; /* Loopback pin active high */
3446 cfblk.fdx = FALSE; /* Disable full duplex operation */
3447 cfblk.dummy_6 = 0x3f; /* all ones */
3448 cfblk.mult_ia = FALSE; /* No multiple individual addresses */
3449 cfblk.dis_bof = FALSE; /* Disable the backoff algorithm ?! */
3450 cfblk.dummy_1 = TRUE; /* set to 1 */
3451 cfblk.tx_ifs_retrig = 3; /* Hmm... Disabled */
3453 cfblk.mc_all = (lp->allmulticast ? TRUE: FALSE); /* Allow all multicasts */
3455 cfblk.mc_all = FALSE; /* No multicast all mode */
3457 cfblk.rcv_mon = 0; /* Monitor mode disabled */
3458 cfblk.frag_acpt = TRUE; /* Do not accept fragments */
3459 cfblk.tstrttrs = FALSE; /* No start transmission threshold */
3460 cfblk.fretx = TRUE; /* FIFO automatic retransmission */
3461 cfblk.syncrqs = FALSE; /* Synchronous DRQ deassertion... */
3462 cfblk.sttlen = TRUE; /* 6 byte status registers */
3463 cfblk.rx_eop = TRUE; /* Signal EOP on packet reception */
3464 cfblk.tx_eop = TRUE; /* Signal EOP on packet transmission */
3465 cfblk.rbuf_size = RX_SIZE>>11; /* Set receive buffer size */
3466 cfblk.rcvstop = TRUE; /* Enable Receive Stop Register */
3470 u_char *c = (u_char *) &cfblk;
3487 outsb(PIOP(base), (char *) &cfblk, sizeof(struct i82593_conf_block));