477 	outb_p(program_seq[i].value, ioaddr + program_seq[i].offset);  in get_prom()
533     outb_p(0x01, ioaddr + EN0_DCFG);	/* Set word-wide access. */  in get_ax88190()
534     outb_p(0x00, ioaddr + EN0_RSARLO);	/* DMA starting at 0x0400. */  in get_ax88190()
535     outb_p(0x04, ioaddr + EN0_RSARHI);  in get_ax88190()
536     outb_p(E8390_RREAD+E8390_START, ioaddr + E8390_CMD);  in get_ax88190()
963     outb_p(0x08, addr);  in mdio_reset()
964     outb_p(0x0c, addr);  in mdio_reset()
965     outb_p(0x08, addr);  in mdio_reset()
966     outb_p(0x0c, addr);  in mdio_reset()
967     outb_p(0x00, addr);  in mdio_reset()
999 	outb_p(EE_EEP|EE_CS|dataval, ee_addr);  in read_eeprom()
1000 	outb_p(EE_EEP|EE_CS|dataval|EE_CK, ee_addr);  in read_eeprom()
1005 	outb_p(EE_EEP|EE_CS | EE_CK, ee_addr);  in read_eeprom()
1007 	outb_p(EE_EEP|EE_CS, ee_addr);  in read_eeprom()
1038 		outb_p(EE_ASIC|EE_CS|EE_DI|dataval, ee_addr);  in write_asic()
1039 		outb_p(EE_ASIC|EE_CS|EE_DI|dataval|EE_CK, ee_addr);  in write_asic()
1040 		outb_p(EE_ASIC|EE_CS|EE_DI|dataval, ee_addr);  in write_asic()
1049 		outb_p(EE_ASIC|EE_CS|dataval, ee_addr);  in write_asic()
1050 		outb_p(EE_ASIC|EE_CS|dataval|EE_CK, ee_addr);  in write_asic()
1051 		outb_p(EE_ASIC|EE_CS|dataval, ee_addr);  in write_asic()
1078 	outb_p(tmp, nic_base + PCNET_MISC);  in set_misc_reg()
1182     outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, nic_base + E8390_CMD);  in pcnet_reset_8390()
1191     outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */  in pcnet_reset_8390()
1239     outb_p(E8390_NODMA+E8390_PAGE0, nic_base + E8390_CMD);  in ei_watchdog()
1370     outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD);  in dma_get_8390_hdr()
1371     outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);  in dma_get_8390_hdr()
1372     outb_p(0, nic_base + EN0_RCNTHI);  in dma_get_8390_hdr()
1373     outb_p(0, nic_base + EN0_RSARLO);		/* On page boundary */  in dma_get_8390_hdr()
1374     outb_p(ring_page, nic_base + EN0_RSARHI);  in dma_get_8390_hdr()
1375     outb_p(E8390_RREAD+E8390_START, nic_base + PCNET_CMD);  in dma_get_8390_hdr()
1382     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_get_8390_hdr()
1406     outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD);  in dma_block_input()
1407     outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in dma_block_input()
1408     outb_p(count >> 8, nic_base + EN0_RCNTHI);  in dma_block_input()
1409     outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO);  in dma_block_input()
1410     outb_p(ring_offset >> 8, nic_base + EN0_RSARHI);  in dma_block_input()
1411     outb_p(E8390_RREAD+E8390_START, nic_base + PCNET_CMD);  in dma_block_input()
1437     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_block_input()
1471     outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base+PCNET_CMD);  in dma_block_output()
1477     outb_p(ENISR_RDC, nic_base + EN0_ISR);  in dma_block_output()
1480     outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in dma_block_output()
1481     outb_p(count >> 8,   nic_base + EN0_RCNTHI);  in dma_block_output()
1482     outb_p(0x00, nic_base + EN0_RSARLO);  in dma_block_output()
1483     outb_p(start_page, nic_base + EN0_RSARHI);  in dma_block_output()
1485     outb_p(E8390_RWRITE+E8390_START, nic_base + PCNET_CMD);  in dma_block_output()
1521     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_block_output()