1066     ioaddr_t nic_base = dev->base_addr;  in set_misc_reg()  local
1071 	tmp = inb_p(nic_base + PCNET_MISC) & ~3;  in set_misc_reg()
1078 	outb_p(tmp, nic_base + PCNET_MISC);  in set_misc_reg()
1082 	    mdio_reset(nic_base + DLINK_GPIO, info->eth_phy);  in set_misc_reg()
1084 	    mdio_write(nic_base + DLINK_GPIO, info->eth_phy, 0, 0x0000);  in set_misc_reg()
1085 	    mdio_write(nic_base + DLINK_GPIO, info->eth_phy, 0, 0x1200);  in set_misc_reg()
1088 	    outb(full_duplex ? 4 : 0, nic_base + DLINK_DIAG);  in set_misc_reg()
1177     ioaddr_t nic_base = dev->base_addr;  in pcnet_reset_8390()  local
1182     outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, nic_base + E8390_CMD);  in pcnet_reset_8390()
1184     outb(inb(nic_base + PCNET_RESET), nic_base + PCNET_RESET);  in pcnet_reset_8390()
1187 	if ((inb_p(nic_base+EN0_ISR) & ENISR_RESET) != 0)  in pcnet_reset_8390()
1191     outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */  in pcnet_reset_8390()
1231     ioaddr_t nic_base = dev->base_addr;  in ei_watchdog()  local
1232     ioaddr_t mii_addr = nic_base + DLINK_GPIO;  in ei_watchdog()
1239     outb_p(E8390_NODMA+E8390_PAGE0, nic_base + E8390_CMD);  in ei_watchdog()
1240     if (info->stale++ && (inb_p(nic_base + EN0_ISR) & ENISR_ALL)) {  in ei_watchdog()
1275 	    outb((p & 0x0140) ? 4 : 0, nic_base + DLINK_DIAG);  in ei_watchdog()
1360     ioaddr_t nic_base = dev->base_addr;  in dma_get_8390_hdr()  local
1370     outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD);  in dma_get_8390_hdr()
1371     outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);  in dma_get_8390_hdr()
1372     outb_p(0, nic_base + EN0_RCNTHI);  in dma_get_8390_hdr()
1373     outb_p(0, nic_base + EN0_RSARLO);		/* On page boundary */  in dma_get_8390_hdr()
1374     outb_p(ring_page, nic_base + EN0_RSARHI);  in dma_get_8390_hdr()
1375     outb_p(E8390_RREAD+E8390_START, nic_base + PCNET_CMD);  in dma_get_8390_hdr()
1377     insw(nic_base + PCNET_DATAPORT, hdr,  in dma_get_8390_hdr()
1382     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_get_8390_hdr()
1391     ioaddr_t nic_base = dev->base_addr;  in dma_block_input()  local
1406     outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD);  in dma_block_input()
1407     outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in dma_block_input()
1408     outb_p(count >> 8, nic_base + EN0_RCNTHI);  in dma_block_input()
1409     outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO);  in dma_block_input()
1410     outb_p(ring_offset >> 8, nic_base + EN0_RSARHI);  in dma_block_input()
1411     outb_p(E8390_RREAD+E8390_START, nic_base + PCNET_CMD);  in dma_block_input()
1413     insw(nic_base + PCNET_DATAPORT,buf,count>>1);  in dma_block_input()
1415 	buf[count-1] = inb(nic_base + PCNET_DATAPORT), xfer_count++;  in dma_block_input()
1425 	    int high = inb_p(nic_base + EN0_RSARHI);  in dma_block_input()
1426 	    int low = inb_p(nic_base + EN0_RSARLO);  in dma_block_input()
1437     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_block_input()
1446     ioaddr_t nic_base = dev->base_addr;  in dma_block_output()  local
1471     outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base+PCNET_CMD);  in dma_block_output()
1477     outb_p(ENISR_RDC, nic_base + EN0_ISR);  in dma_block_output()
1480     outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in dma_block_output()
1481     outb_p(count >> 8,   nic_base + EN0_RCNTHI);  in dma_block_output()
1482     outb_p(0x00, nic_base + EN0_RSARLO);  in dma_block_output()
1483     outb_p(start_page, nic_base + EN0_RSARHI);  in dma_block_output()
1485     outb_p(E8390_RWRITE+E8390_START, nic_base + PCNET_CMD);  in dma_block_output()
1486     outsw(nic_base + PCNET_DATAPORT, buf, count>>1);  in dma_block_output()
1496 	    int high = inb_p(nic_base + EN0_RSARHI);  in dma_block_output()
1497 	    int low = inb_p(nic_base + EN0_RSARLO);  in dma_block_output()
1512     while ((inb_p(nic_base + EN0_ISR) & ENISR_RDC) == 0)  in dma_block_output()
1521     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_block_output()