331 	outb_p(program_seq[i].value, ioaddr + program_seq[i].offset);  in get_prom()
639 	outb_p(MDIO_DATA_WRITE1, addr);  in mdio_sync()
640 	outb_p(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);  in mdio_sync()
652 	outb_p(dat, addr);  in mdio_read()
653 	outb_p(dat | MDIO_SHIFT_CLK, addr);  in mdio_read()
656 	outb_p(MDIO_ENB_IN, addr);  in mdio_read()
658 	outb_p(MDIO_ENB_IN | MDIO_SHIFT_CLK, addr);  in mdio_read()
671 	outb_p(dat, addr);  in mdio_write()
672 	outb_p(dat | MDIO_SHIFT_CLK, addr);  in mdio_write()
675 	outb_p(MDIO_ENB_IN, addr);  in mdio_write()
676 	outb_p(MDIO_ENB_IN | MDIO_SHIFT_CLK, addr);  in mdio_write()
743     outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, nic_base + E8390_CMD);  in axnet_reset_8390()
752     outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */  in axnet_reset_8390()
871     outb_p(0, nic_base + EN0_RSARLO);		/* On page boundary */  in get_8390_hdr()
872     outb_p(ring_page, nic_base + EN0_RSARHI);  in get_8390_hdr()
873     outb_p(E8390_RREAD+E8390_START, nic_base + AXNET_CMD);  in get_8390_hdr()
895     outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO);  in block_input()
896     outb_p(ring_offset >> 8, nic_base + EN0_RSARHI);  in block_input()
897     outb_p(E8390_RREAD+E8390_START, nic_base + AXNET_CMD);  in block_input()
923     outb_p(0x00, nic_base + EN0_RSARLO);  in block_output()
924     outb_p(start_page, nic_base + EN0_RSARHI);  in block_output()
925     outb_p(E8390_RWRITE+E8390_START, nic_base + AXNET_CMD);  in block_output()
1225 	outb_p(0x00, e8390_base + EN0_IMR);  in ei_start_xmit()
1271 		outb_p(ENISR_ALL, e8390_base + EN0_IMR);  in ei_start_xmit()
1318 	outb_p(ENISR_ALL, e8390_base + EN0_IMR);  in ei_start_xmit()
1382 	outb_p(0x00, e8390_base + EN0_ISR);  in ax_interrupt()
1392 			outb_p(interrupts, e8390_base + EN0_ISR);  in ax_interrupt()
1397 		outb_p(interrupts, e8390_base + EN0_ISR);  in ax_interrupt()
1401 			outb_p(0, e8390_base + EN0_ISR);  in ax_interrupt()
1402 			outb_p(interrupts, e8390_base + EN0_ISR);  in ax_interrupt()
1433 			outb_p(ENISR_ALL, e8390_base + EN0_ISR); /* Ack. most intrs. */  in ax_interrupt()
1436 			outb_p(0xff, e8390_base + EN0_ISR); /* Ack. all intrs. */  in ax_interrupt()
1442 	outb_p(ENISR_ALL, e8390_base + EN0_IMR);  in ax_interrupt()
1683 		outb_p(next_frame-1, e8390_base+EN0_BOUNDARY);  in ei_receive()
1714 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD);  in ei_rx_overrun()
1732 	outb_p(0x00, e8390_base+EN0_RCNTLO);  in ei_rx_overrun()
1733 	outb_p(0x00, e8390_base+EN0_RCNTHI);  in ei_rx_overrun()
1751 	outb_p(E8390_TXOFF, e8390_base + EN0_TXCR);  in ei_rx_overrun()
1752 	outb_p(E8390_NODMA + E8390_PAGE0 + E8390_START, e8390_base + E8390_CMD);  in ei_rx_overrun()
1762 	outb_p(E8390_TXCONFIG | info->duplex_flag, e8390_base + EN0_TXCR);   in ei_rx_overrun()
1764     		outb_p(E8390_NODMA + E8390_PAGE0 + E8390_START + E8390_TRANS, e8390_base + E8390_CMD);  in ei_rx_overrun()
1804   		outb_p(E8390_RXCONFIG | 0x58, e8390_base + EN0_RXCR);  in do_set_multicast_list()
1806   		outb_p(E8390_RXCONFIG | 0x48, e8390_base + EN0_RXCR);  in do_set_multicast_list()
1808   		outb_p(E8390_RXCONFIG | 0x40, e8390_base + EN0_RXCR);  in do_set_multicast_list()
1882 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD); /* 0x21 */  in AX88190_init()
1883 	outb_p(endcfg, e8390_base + EN0_DCFG);	/* 0x48 or 0x49 */  in AX88190_init()
1885 	outb_p(0x00,  e8390_base + EN0_RCNTLO);  in AX88190_init()
1886 	outb_p(0x00,  e8390_base + EN0_RCNTHI);  in AX88190_init()
1888 	outb_p(E8390_RXOFF|0x40, e8390_base + EN0_RXCR); /* 0x60 */  in AX88190_init()
1889 	outb_p(E8390_TXOFF, e8390_base + EN0_TXCR); /* 0x02 */  in AX88190_init()
1891 	outb_p(ei_local->tx_start_page, e8390_base + EN0_TPSR);  in AX88190_init()
1893 	outb_p(ei_local->rx_start_page, e8390_base + EN0_STARTPG);  in AX88190_init()
1894 	outb_p(ei_local->stop_page-1, e8390_base + EN0_BOUNDARY);	/* 3c503 says 0x3f,NS0x26*/  in AX88190_init()
1896 	outb_p(ei_local->stop_page, e8390_base + EN0_STOPPG);  in AX88190_init()
1898 	outb_p(0xFF, e8390_base + EN0_ISR);  in AX88190_init()
1899 	outb_p(0x00,  e8390_base + EN0_IMR);  in AX88190_init()
1903 	outb_p(E8390_NODMA + E8390_PAGE1 + E8390_STOP, e8390_base+E8390_CMD); /* 0x61 */  in AX88190_init()
1906 		outb_p(dev->dev_addr[i], e8390_base + EN1_PHYS_SHIFT(i));  in AX88190_init()
1915 		outb_p(0xff, e8390_base + EN1_MULT + i);  in AX88190_init()
1917 	outb_p(ei_local->rx_start_page, e8390_base + EN1_CURPAG);  in AX88190_init()
1918 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD);  in AX88190_init()
1926 		outb_p(0xff,  e8390_base + EN0_ISR);  in AX88190_init()
1927 		outb_p(ENISR_ALL,  e8390_base + EN0_IMR);  in AX88190_init()
1928 		outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, e8390_base+E8390_CMD);  in AX88190_init()
1929 		outb_p(E8390_TXCONFIG | info->duplex_flag,  in AX88190_init()
1932 		outb_p(E8390_RXCONFIG | 0x40, e8390_base + EN0_RXCR); /* rx on, */  in AX88190_init()
1952 	outb_p(length & 0xff, e8390_base + EN0_TCNTLO);  in NS8390_trigger_send()
1953 	outb_p(length >> 8, e8390_base + EN0_TCNTHI);  in NS8390_trigger_send()
1954 	outb_p(start_page, e8390_base + EN0_TPSR);  in NS8390_trigger_send()
1955 	outb_p(E8390_NODMA+E8390_TRANS+E8390_START, e8390_base+E8390_CMD);  in NS8390_trigger_send()