221 static void vlsi_reg_debug(unsigned iobase, const char *s)  in vlsi_reg_debug()  argument
228 		printk("%02x", (unsigned)inb((iobase+i)));  in vlsi_reg_debug()
432 	unsigned iobase;   in vlsi_set_baud()  local
439 	iobase = ndev->base_addr;  in vlsi_set_baud()
445 	outw(0, iobase+VLSI_PIO_IRENABLE);  in vlsi_set_baud()
479 	outw(config, iobase+VLSI_PIO_IRCFG);  in vlsi_set_baud()
481 	outw(nphyctl, iobase+VLSI_PIO_NPHYCTL);  in vlsi_set_baud()
483 	outw(IRENABLE_IREN, iobase+VLSI_PIO_IRENABLE);  in vlsi_set_baud()
488 	config = inw(iobase+VLSI_PIO_IRENABLE) & IRENABLE_MASK;  in vlsi_set_baud()
504 		if (inw(iobase+VLSI_PIO_PHYCTL) != nphyctl) {  in vlsi_set_baud()
519 		vlsi_reg_debug(iobase,__FUNCTION__);  in vlsi_set_baud()
529 	unsigned	iobase;  in vlsi_init_chip()  local
532 	iobase = ndev->base_addr;  in vlsi_init_chip()
534 	outb(IRINTR_INT_MASK, iobase+VLSI_PIO_IRINTR); /* w/c pending IRQ, disable all INT */  in vlsi_init_chip()
536 	outw(0, iobase+VLSI_PIO_IRENABLE);	/* disable IrPHY-interface */  in vlsi_init_chip()
540 	outw(0, iobase+VLSI_PIO_IRCFG);  in vlsi_init_chip()
542 	outw(IRENABLE_IREN, iobase+VLSI_PIO_IRENABLE);  in vlsi_init_chip()
546 	outw(0, iobase+VLSI_PIO_IRENABLE);  in vlsi_init_chip()
548 	outw(MAX_PACKET_LENGTH, iobase+VLSI_PIO_MAXPKT);  /* max possible value=0x0fff */  in vlsi_init_chip()
550 	outw(BUS_TO_RINGBASE(idev->busaddr), iobase+VLSI_PIO_RINGBASE);  in vlsi_init_chip()
553 		iobase+VLSI_PIO_RINGSIZE);	  in vlsi_init_chip()
555 	ptr = inw(iobase+VLSI_PIO_RINGPTR);  in vlsi_init_chip()
559 	outw(IRCFG_MSTR, iobase+VLSI_PIO_IRCFG);		/* ready for memory access */  in vlsi_init_chip()
561 	outw(IRENABLE_IREN, iobase+VLSI_PIO_IRENABLE);  in vlsi_init_chip()
568 	outb(IRINTR_INT_MASK, iobase+VLSI_PIO_IRINTR);	/* just in case - w/c pending IRQ's */  in vlsi_init_chip()
576 	outb(IRINTR_RPKTEN|IRINTR_TPKTEN, iobase+VLSI_PIO_IRINTR);  in vlsi_init_chip()
670 	unsigned	iobase;  in vlsi_tx_interrupt()  local
701 	iobase = ndev->base_addr;  in vlsi_tx_interrupt()
705 		outw(0, iobase+VLSI_PIO_IRENABLE);  in vlsi_tx_interrupt()
706 		config = inw(iobase+VLSI_PIO_IRCFG);  in vlsi_tx_interrupt()
708 		outw((config & ~IRCFG_ENTX) | IRCFG_ENRX, iobase+VLSI_PIO_IRCFG);  in vlsi_tx_interrupt()
710 		outw(IRENABLE_IREN, iobase+VLSI_PIO_IRENABLE);  in vlsi_tx_interrupt()
716 	outw(0, iobase+VLSI_PIO_PROMPT);  in vlsi_tx_interrupt()
739 	unsigned	iobase;  in vlsi_interrupt()  local
747 	iobase = ndev->base_addr;  in vlsi_interrupt()
750 		irintr = inb(iobase+VLSI_PIO_IRINTR);  in vlsi_interrupt()
752 		outb(irintr, iobase+VLSI_PIO_IRINTR); /* acknowledge asap */  in vlsi_interrupt()
805 static inline void vlsi_clear_regs(unsigned iobase)  in vlsi_clear_regs()  argument
811 		outw(0, iobase + i);  in vlsi_clear_regs()
894 	unsigned iobase;  in vlsi_close()  local
897 	iobase = ndev->base_addr;  in vlsi_close()
904 	outb(IRINTR_INT_MASK, iobase+VLSI_PIO_IRINTR);	/* w/c pending + disable further IRQ */  in vlsi_close()
906 	outw(0, iobase+VLSI_PIO_IRENABLE);  in vlsi_close()
907 	outw(0, iobase+VLSI_PIO_IRCFG);			/* disable everything */  in vlsi_close()
909 	outw(IRENABLE_IREN, iobase+VLSI_PIO_IRENABLE);  in vlsi_close()
912 	outw(0, iobase+VLSI_PIO_IRENABLE);  in vlsi_close()
955 	unsigned iobase;  in vlsi_hard_start_xmit()  local
1009 	vlsi_reg_debug(iobase,__FUNCTION__);  in vlsi_hard_start_xmit()
1049 	iobase = ndev->base_addr;  in vlsi_hard_start_xmit()
1056 	if (!(inw(iobase+VLSI_PIO_IRENABLE) & IRENABLE_ENTXST)) {  in vlsi_hard_start_xmit()
1058 		outw(0, iobase+VLSI_PIO_IRENABLE);  in vlsi_hard_start_xmit()
1060 		config = inw(iobase+VLSI_PIO_IRCFG);  in vlsi_hard_start_xmit()
1062 		outw(config | IRCFG_ENTX, iobase+VLSI_PIO_IRCFG);  in vlsi_hard_start_xmit()
1064 		outw(IRENABLE_IREN, iobase+VLSI_PIO_IRENABLE);  in vlsi_hard_start_xmit()
1066 		outw(0, iobase+VLSI_PIO_PROMPT);  in vlsi_hard_start_xmit()
1081 		vlsi_reg_debug(iobase,__FUNCTION__);  in vlsi_hard_start_xmit()