77 static int  irport_write(int iobase, int fifo_size, __u8 *buf, int len);
139 irport_open(int i, unsigned int iobase, unsigned int irq)  in irport_open()  argument
166 	self->io.sir_base  = iobase;  in irport_open()
239 	dev->base_addr = iobase;  in irport_open()
291 	int iobase;  in irport_start()  local
293 	iobase = self->io.sir_base;  in irport_start()
300 	outb(UART_LCR_WLEN8, iobase+UART_LCR);  /* Reset DLAB */  in irport_start()
301 	outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR);  in irport_start()
304 	outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, iobase+UART_IER);  in irport_start()
312 	int iobase;  in irport_stop()  local
314 	iobase = self->io.sir_base;  in irport_stop()
319 	outb(0, iobase+UART_MCR);  in irport_stop()
322 	outb(0, iobase+UART_IER);  in irport_stop()
333 int irport_probe(int iobase)  in irport_probe()  argument
335 	IRDA_DEBUG(4, "%s(), iobase=%#x\n", __FUNCTION__, iobase);  in irport_probe()
350 	int iobase;   in irport_change_speed()  local
360 	iobase = self->io.sir_base;  in irport_change_speed()
368 	outb(0, iobase+UART_IER);   in irport_change_speed()
387 	outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */  in irport_change_speed()
388 	outb(divisor & 0xff,      iobase+UART_DLL); /* Set speed */  in irport_change_speed()
389 	outb(divisor >> 8,	  iobase+UART_DLM);  in irport_change_speed()
390 	outb(lcr,		  iobase+UART_LCR); /* Set 8N1	*/  in irport_change_speed()
391 	outb(fcr,		  iobase+UART_FCR); /* Enable FIFO's */  in irport_change_speed()
394 	outb(/*UART_IER_RLSI|*/UART_IER_RDI/*|UART_IER_THRI*/, iobase+UART_IER);  in irport_change_speed()
481 	int iobase;  in irport_write_wakeup()  local
488 	iobase = self->io.sir_base;  in irport_write_wakeup()
493 		actual = irport_write(iobase, self->io.fifo_size,   in irport_write_wakeup()
525 		outb(fcr, iobase+UART_FCR);  in irport_write_wakeup()
528 		outb(UART_IER_RDI, iobase+UART_IER);  in irport_write_wakeup()
538 static int irport_write(int iobase, int fifo_size, __u8 *buf, int len)  in irport_write()  argument
543 	if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) {  in irport_write()
551 		outb(buf[actual], iobase+UART_TX);  in irport_write()
594 	int iobase;  in irport_timeout()  local
597 	iobase = self->io.sir_base;  in irport_timeout()
617 	int iobase;  in irport_hard_xmit()  local
627 	iobase = self->io.sir_base;  in irport_hard_xmit()
657 	outb(UART_IER_THRI, iobase+UART_IER);   in irport_hard_xmit()
675 	int iobase;  in irport_receive()  local
679 	iobase = self->io.sir_base;  in irport_receive()
687 				  inb(iobase+UART_RX));  in irport_receive()
694 	} while (inb(iobase+UART_LSR) & UART_LSR_DR);	  in irport_receive()
707 	int iobase;  in irport_interrupt()  local
718 	iobase = self->io.sir_base;  in irport_interrupt()
720 	iir = inb(iobase+UART_IIR) & UART_IIR_ID;  in irport_interrupt()
723 		lsr = inb(iobase+UART_LSR);  in irport_interrupt()
726 			 __FUNCTION__, iir, lsr, iobase);  in irport_interrupt()
750  	        iir = inb(iobase + UART_IIR) & UART_IIR_ID;  in irport_interrupt()
774 	int iobase;  in irport_net_open()  local
782 	iobase = self->io.sir_base;  in irport_net_open()
822 	int iobase;  in irport_net_close()  local
831 	iobase = self->io.sir_base;  in irport_net_close()
859 	int iobase;
861 	iobase = self->io.sir_base;
864 	while (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) {
892 	int iobase;  in irport_set_dtr_rts()  local
896 	iobase = self->io.sir_base;  in irport_set_dtr_rts()
903 	outb(dtr|rts|UART_MCR_OUT2, iobase+UART_MCR);  in irport_set_dtr_rts()
912 	int iobase;  in irport_raw_write()  local
916 	iobase = self->io.sir_base;  in irport_raw_write()
919 	if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) {  in irport_raw_write()
927 		outb(buf[actual], iobase+UART_TX);  in irport_raw_write()