119 	int iobase;  member
177 #define RBR(iobase)	(iobase+0)  argument
178 #define THR(iobase)	(iobase+0)  argument
179 #define IER(iobase)	(iobase+1)  argument
180 #define IIR(iobase)	(iobase+2)  argument
181 #define FCR(iobase)	(iobase+2)  argument
182 #define LCR(iobase)	(iobase+3)  argument
183 #define MCR(iobase)	(iobase+4)  argument
184 #define LSR(iobase)	(iobase+5)  argument
185 #define MSR(iobase)	(iobase+6)  argument
186 #define SCR(iobase)	(iobase+7)  argument
187 #define DLL(iobase)	(iobase+0)  argument
188 #define DLM(iobase)	(iobase+1)  argument
319 static void fpga_reset(int iobase)  in fpga_reset()  argument
321 	outb(0, IER(iobase));  in fpga_reset()
322 	outb(LCR_DLAB | LCR_BIT5, LCR(iobase));  in fpga_reset()
323 	outb(1, DLL(iobase));  in fpga_reset()
324 	outb(0, DLM(iobase));  in fpga_reset()
326 	outb(LCR_BIT5, LCR(iobase));  in fpga_reset()
327 	inb(LSR(iobase));  in fpga_reset()
328 	inb(MSR(iobase));  in fpga_reset()
330 	outb(MCR_OUT1 | MCR_OUT2, MCR(iobase));  in fpga_reset()
333 	outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase));  in fpga_reset()
341 static int fpga_write(int iobase, unsigned char wrd)  in fpga_write()  argument
349 		outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase));  in fpga_write()
351 		outb(0xfc, THR(iobase));  in fpga_write()
352 		while ((inb(LSR(iobase)) & LSR_TSRE) == 0)  in fpga_write()
412 static int fpga_download(int iobase, int bitrate)  in fpga_download()  argument
421 	fpga_reset(iobase);  in fpga_download()
423 		if (fpga_write(iobase, pbits[i])) {  in fpga_download()
429 	fpga_write(iobase, 0xFF);  in fpga_download()
430 	rc = inb(MSR(iobase));		/* check DONE signal */  in fpga_download()
477 static enum uart yam_check_uart(unsigned int iobase)  in yam_check_uart()  argument
484 	b1 = inb(MCR(iobase));  in yam_check_uart()
485 	outb(b1 | 0x10, MCR(iobase));	/* loopback mode */  in yam_check_uart()
486 	b2 = inb(MSR(iobase));  in yam_check_uart()
487 	outb(0x1a, MCR(iobase));  in yam_check_uart()
488 	b3 = inb(MSR(iobase)) & 0xf0;  in yam_check_uart()
489 	outb(b1, MCR(iobase));		/* restore old values */  in yam_check_uart()
490 	outb(b2, MSR(iobase));  in yam_check_uart()
493 	inb(RBR(iobase));  in yam_check_uart()
494 	inb(RBR(iobase));  in yam_check_uart()
495 	outb(0x01, FCR(iobase));	/* enable FIFOs */  in yam_check_uart()
496 	u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];  in yam_check_uart()
498 		outb(0x5a, SCR(iobase));  in yam_check_uart()
499 		b1 = inb(SCR(iobase));  in yam_check_uart()
500 		outb(0xa5, SCR(iobase));  in yam_check_uart()
501 		b2 = inb(SCR(iobase));  in yam_check_uart()
773 		if (yam_ports[i].iobase == 0 || yam_ports[i].irq == 0)  in yam_net_get_info()
778 		len += sprintf(buffer + len, "  IoBase   0x%x\n", yam_ports[i].iobase);  in yam_net_get_info()
982 			yp->iobase = yi.cfg.iobase;  in yam_ioctl()
983 			dev->base_addr = yi.cfg.iobase;  in yam_ioctl()
1036 		yi.cfg.iobase = yp->iobase;  in yam_ioctl()
1125 		yam_ports[i].iobase = 0;  in yam_init_driver()
1137 		dev->base_addr = yam_ports[i].iobase;  in yam_init_driver()