75 static void write_codec(struct net_device *dev, unsigned char idx,  in write_codec()  function
136 	write_codec(dev, 0x48, fmt);  in wss_set_codec_fmt()
138 		write_codec(dev, 0x5c, fmt2 & 0xf0);  in wss_set_codec_fmt()
140 		write_codec(dev, 0x49, (fdx ? 0 : 0x4) | (fullcalib ? 0x18 : 0));  in wss_set_codec_fmt()
143 		write_codec(dev, 0x49, fdx ? 0x8 : 0xc);  in wss_set_codec_fmt()
254 	write_codec(dev, 9, 0);  in wss_init_codec()
255 	write_codec(dev, 0, 0x45);  in wss_init_codec()
258 	write_codec(dev, 0, 0xaa);  in wss_init_codec()
261 	write_codec(dev, 12, 0x40); /* enable MODE2 */  in wss_init_codec()
262 	write_codec(dev, 16, 0);  in wss_init_codec()
263 	write_codec(dev, 0, 0x45);  in wss_init_codec()
265 	write_codec(dev, 0, 0xaa);  in wss_init_codec()
271 		write_codec(dev, 0x10, 0x80); /* maximum output level */  in wss_init_codec()
272 		write_codec(dev, 0x11, 0x02); /* xtal enable and no HPF */  in wss_init_codec()
273 		write_codec(dev, 0x12, 0x80); /* left line input control */  in wss_init_codec()
274 		write_codec(dev, 0x13, 0x80); /* right line input control */  in wss_init_codec()
275 		write_codec(dev, 0x16, 0); /* disable alternative freq sel */  in wss_init_codec()
276 		write_codec(dev, 0x1a, 0xe0); /* mono IO disable */  in wss_init_codec()
277 		write_codec(dev, 0x1b, 0x00); /* left out no att */  in wss_init_codec()
278 		write_codec(dev, 0x1d, 0x00); /* right out no att */  in wss_init_codec()
284         write_codec(dev, 0, reg0); /* left input control */  in wss_init_codec()
285         write_codec(dev, 1, reg1); /* right input control */  in wss_init_codec()
286         write_codec(dev, 2, 0x80); /* left aux#1 input control */  in wss_init_codec()
287         write_codec(dev, 3, 0x80); /* right aux#1 input control */  in wss_init_codec()
288         write_codec(dev, 4, 0x80); /* left aux#2 input control */  in wss_init_codec()
289         write_codec(dev, 5, 0x80); /* right aux#2 input control */  in wss_init_codec()
290         write_codec(dev, 6, reg6); /* left dac control */  in wss_init_codec()
291         write_codec(dev, 7, reg7); /* right dac control */  in wss_init_codec()
292         write_codec(dev, 0xa, 0x2); /* pin control register */  in wss_init_codec()
293         write_codec(dev, 0xd, 0x0); /* digital mix control */  in wss_init_codec()
333         write_codec(dev, 9, 0xc); /* disable codec */  in setup_dma_wss()
348 	write_codec(dev, 15, numsamps & 0xff);  in setup_dma_wss()
349 	write_codec(dev, 14, numsamps >> 8);  in setup_dma_wss()
350 	write_codec(dev, 9, codecmode[send]);  in setup_dma_wss()
371 	write_codec(dev, 15, nums  & 0xff);  in wss_interrupt()
372 	write_codec(dev, 14, nums >> 8);  in wss_interrupt()
467         write_codec(dev, 9, 0xc); /* disable codec */  in wss_close()
621 		write_codec(dev, bi.data.mix.reg, bi.data.mix.data);  in wss_ioctl()
653         write_codec(dev, 9, 0); /* disable codec DMA */  in setup_fdx_dma_wss()
664 	write_codec(dev, 15, osamps & 0xff);  in setup_fdx_dma_wss()
665 	write_codec(dev, 14, osamps >> 8);  in setup_fdx_dma_wss()
667 		write_codec(dev, 31, isamps & 0xff);  in setup_fdx_dma_wss()
668 		write_codec(dev, 30, isamps >> 8);  in setup_fdx_dma_wss()
670 	write_codec(dev, 9, 3);  in setup_fdx_dma_wss()
697 			write_codec(dev, 15, osamps & 0xff);  in wssfdx_interrupt()
698 			write_codec(dev, 14, osamps >> 8);  in wssfdx_interrupt()
705 			write_codec(dev, 31, isamps & 0xff);  in wssfdx_interrupt()
706 			write_codec(dev, 30, isamps >> 8);  in wssfdx_interrupt()
733 	write_codec(dev, 15, osamps & 0xff);  in wssfdx_interrupt()
734 	write_codec(dev, 14, osamps >> 8);  in wssfdx_interrupt()
736 		write_codec(dev, 31, isamps & 0xff);  in wssfdx_interrupt()
737 		write_codec(dev, 30, isamps >> 8);  in wssfdx_interrupt()
824         write_codec(dev, 9, 0xc); /* disable codec */  in wssfdx_close()