Lines Matching refs:iobase

102 #define RBR(iobase) (iobase+0)  argument
103 #define THR(iobase) (iobase+0) argument
104 #define IER(iobase) (iobase+1) argument
105 #define IIR(iobase) (iobase+2) argument
106 #define FCR(iobase) (iobase+2) argument
107 #define LCR(iobase) (iobase+3) argument
108 #define MCR(iobase) (iobase+4) argument
109 #define LSR(iobase) (iobase+5) argument
110 #define MSR(iobase) (iobase+6) argument
111 #define SCR(iobase) (iobase+7) argument
112 #define DLL(iobase) (iobase+0) argument
113 #define DLM(iobase) (iobase+1) argument
375 static enum uart ser12_check_uart(unsigned int iobase) in ser12_check_uart() argument
382 b1 = inb(MCR(iobase)); in ser12_check_uart()
383 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in ser12_check_uart()
384 b2 = inb(MSR(iobase)); in ser12_check_uart()
385 outb(0x1a, MCR(iobase)); in ser12_check_uart()
386 b3 = inb(MSR(iobase)) & 0xf0; in ser12_check_uart()
387 outb(b1, MCR(iobase)); /* restore old values */ in ser12_check_uart()
388 outb(b2, MSR(iobase)); in ser12_check_uart()
391 inb(RBR(iobase)); in ser12_check_uart()
392 inb(RBR(iobase)); in ser12_check_uart()
393 outb(0x01, FCR(iobase)); /* enable FIFOs */ in ser12_check_uart()
394 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3]; in ser12_check_uart()
396 outb(0x5a, SCR(iobase)); in ser12_check_uart()
397 b1 = inb(SCR(iobase)); in ser12_check_uart()
398 outb(0xa5, SCR(iobase)); in ser12_check_uart()
399 b2 = inb(SCR(iobase)); in ser12_check_uart()
603 static int iobase[NR_PORTS] = { 0x3f8, }; variable
609 MODULE_PARM(iobase, "1-" __MODULE_STRING(NR_PORTS) "i");
610 MODULE_PARM_DESC(iobase, "baycom io base address");
640 iobase[i] = irq[i] = 0; in init_baycomserfdx()
642 ifname, iobase[i], irq[i], 0); in init_baycomserfdx()
703 iobase[nr_dev] = ints[1]; in baycom_ser_fdx_setup()