Lines Matching refs:phyreg
1735 u32 control_1000, status_1000, phyreg; in nv_update_linkspeed() local
1832 phyreg = readl(base + NvRegRandomSeed); in nv_update_linkspeed()
1833 phyreg &= ~(0x3FF00); in nv_update_linkspeed()
1835 phyreg |= NVREG_RNDSEED_FORCE3; in nv_update_linkspeed()
1837 phyreg |= NVREG_RNDSEED_FORCE2; in nv_update_linkspeed()
1839 phyreg |= NVREG_RNDSEED_FORCE; in nv_update_linkspeed()
1840 writel(phyreg, base + NvRegRandomSeed); in nv_update_linkspeed()
1843 phyreg = readl(base + NvRegPhyInterface); in nv_update_linkspeed()
1844 phyreg &= ~(PHY_HALF|PHY_100|PHY_1000); in nv_update_linkspeed()
1846 phyreg |= PHY_HALF; in nv_update_linkspeed()
1848 phyreg |= PHY_100; in nv_update_linkspeed()
1850 phyreg |= PHY_1000; in nv_update_linkspeed()
1851 writel(phyreg, base + NvRegPhyInterface); in nv_update_linkspeed()