248 proc_reset(struct net_device *dev0, int reset)  in proc_reset()  argument
250 	DGRS_PRIV	*priv0 = (DGRS_PRIV *) dev0->priv;  in proc_reset()
255 		val = inl(dev0->base_addr + PLX_MISC_CSR);  in proc_reset()
260 		OUTL(dev0->base_addr + PLX_MISC_CSR, val);  in proc_reset()
264 		OUTB(dev0->base_addr + ES4H_PC, reset ? ES4H_PC_RESET : 0);  in proc_reset()
272 check_board_dma(struct net_device *dev0)  in check_board_dma()  argument
274 	DGRS_PRIV	*priv0 = (DGRS_PRIV *) dev0->priv;  in check_board_dma()
290 	OUTL(dev0->base_addr + PLX_ROM_BASE_ADDR, 0x80000000);  in check_board_dma()
305 	OUTL(dev0->base_addr + PLX_BUS_REGION, 0x49430343);  in check_board_dma()
313 		printk("%s: can't *remap() the DMA regs\n", dev0->name);  in check_board_dma()
452 	struct net_device	*dev0,  in dgrs_rcv_frame()  argument
483 		devN = dev0;  in dgrs_rcv_frame()
544 				proc_reset(dev0, 1);	/* Freeze IDT */  in dgrs_rcv_frame()
575 			rc = do_plx_dma(dev0,  in dgrs_rcv_frame()
613 				proc_reset(dev0, 1);	/* Freeze IDT */  in dgrs_rcv_frame()
616 			rc = do_plx_dma(dev0, (ulong) phys_p,  in dgrs_rcv_frame()
648 				proc_reset(dev0, 1);	/* Freeze IDT */  in dgrs_rcv_frame()
693 	struct net_device	*dev0;  in dgrs_start_xmit()  local
704 		dev0 = privN->devtbl[0];  in dgrs_start_xmit()
705 		priv0 = (DGRS_PRIV *) dev0->priv;  in dgrs_start_xmit()
709 		dev0 = devN;  in dgrs_start_xmit()
894 	struct net_device	*dev0 = (struct net_device *) dev_id;  in dgrs_intr()  local
895 	DGRS_PRIV	*priv0 = (DGRS_PRIV *) dev0->priv;  in dgrs_intr()
906 		printk("%s: interrupt: irq %d\n", dev0->name, irq);  in dgrs_intr()
919 		if (0) printk("%s: RUC start\n", dev0->name);  in dgrs_intr()
932 			netif_wake_queue (dev0);  in dgrs_intr()
957 			dgrs_rcv_frame(dev0, priv0, cbp);  in dgrs_intr()
974 		OUTL(dev0->base_addr + PLX_LCL2PCI_DOORBELL, 1);  in dgrs_intr()
981 dgrs_download(struct net_device *dev0)  in dgrs_download()  argument
983 	DGRS_PRIV	*priv0 = (DGRS_PRIV *) dev0->priv;  in dgrs_download()
996 	priv0->vmem = ioremap(dev0->mem_start, 2048*1024);  in dgrs_download()
999 		printk("%s: cannot map in board memory\n", dev0->name);  in dgrs_download()
1008 		proc_reset(dev0, 1);  in dgrs_download()
1012 		is = iv2is[dev0->irq & 0x0f];  in dgrs_download()
1015 			printk("%s: Illegal IRQ %d\n", dev0->name, dev0->irq);  in dgrs_download()
1018 		OUTB(dev0->base_addr + ES4H_AS_31_24,  in dgrs_download()
1019 			(uchar) (dev0->mem_start >> 24) );  in dgrs_download()
1020 		OUTB(dev0->base_addr + ES4H_AS_23_16,  in dgrs_download()
1021 			(uchar) (dev0->mem_start >> 16) );  in dgrs_download()
1023 			((uchar) (dev0->mem_start >> 8) & ES4H_IS_AS15);  in dgrs_download()
1024 		OUTB(dev0->base_addr + ES4H_IS, priv0->is_reg);  in dgrs_download()
1025 		OUTB(dev0->base_addr + ES4H_EC, ES4H_EC_ENABLE);  in dgrs_download()
1026 		OUTB(dev0->base_addr + ES4H_PC, ES4H_PC_RESET);  in dgrs_download()
1027 		OUTB(dev0->base_addr + ES4H_MW, ES4H_MW_ENABLE | 0x00);  in dgrs_download()
1033 	priv0->use_dma = check_board_dma(dev0);  in dgrs_download()
1035 		printk("%s: Bus Master DMA is enabled.\n", dev0->name);  in dgrs_download()
1045 		printk("%s: download compare failed\n", dev0->name);  in dgrs_download()
1085 	proc_reset(dev0, 0);  in dgrs_download()
1096 		printk("%s: board not operating\n", dev0->name);  in dgrs_download()
1125 		OUTL(dev0->base_addr + PLX_INT_CSR,  in dgrs_download()
1126 			inl(dev0->base_addr + PLX_INT_CSR)  in dgrs_download()
1128 		OUTL(dev0->base_addr + PLX_LCL2PCI_DOORBELL, 1);  in dgrs_download()