Lines Matching refs:hfcpci
80 cs->hw.hfcpci.pci_io); in release_io_hfcpci()
83 cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */ in release_io_hfcpci()
84 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in release_io_hfcpci()
91 …pcibios_write_config_word(cs->hw.hfcpci.pci_bus, cs->hw.hfcpci.pci_device_fn, PCI_COMMAND, 0); /* … in release_io_hfcpci()
92 del_timer(&cs->hw.hfcpci.timer); in release_io_hfcpci()
93 kfree(cs->hw.hfcpci.share_start); in release_io_hfcpci()
94 cs->hw.hfcpci.share_start = NULL; in release_io_hfcpci()
95 iounmap((void *)cs->hw.hfcpci.pci_io); in release_io_hfcpci()
109 …pcibios_write_config_word(cs->hw.hfcpci.pci_bus, cs->hw.hfcpci.pci_device_fn, PCI_COMMAND, PCI_ENA… in reset_hfcpci()
110 cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */ in reset_hfcpci()
111 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in reset_hfcpci()
114 …pcibios_write_config_word(cs->hw.hfcpci.pci_bus, cs->hw.hfcpci.pci_device_fn, PCI_COMMAND, PCI_ENA… in reset_hfcpci()
125 cs->hw.hfcpci.fifo_en = 0x30; /* only D fifos enabled */ in reset_hfcpci()
126 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in reset_hfcpci()
128 cs->hw.hfcpci.trm = 0 + HFCPCI_BTRANS_THRESMASK; /* no echo connect , threshold */ in reset_hfcpci()
129 Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm); in reset_hfcpci()
132 cs->hw.hfcpci.sctrl_e = HFCPCI_AUTO_AWAKE; in reset_hfcpci()
133 Write_hfc(cs, HFCPCI_SCTRL_E, cs->hw.hfcpci.sctrl_e); /* S/T Auto awake */ in reset_hfcpci()
134 cs->hw.hfcpci.bswapped = 0; /* no exchange */ in reset_hfcpci()
135 cs->hw.hfcpci.nt_mode = 0; /* we are in TE mode */ in reset_hfcpci()
136 cs->hw.hfcpci.ctmt = HFCPCI_TIM3_125 | HFCPCI_AUTO_TIMER; in reset_hfcpci()
137 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt); in reset_hfcpci()
139 cs->hw.hfcpci.int_m1 = HFCPCI_INTS_DTRANS | HFCPCI_INTS_DREC | in reset_hfcpci()
141 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in reset_hfcpci()
149 cs->hw.hfcpci.mst_m = HFCPCI_MASTER; /* HFC Master Mode */ in reset_hfcpci()
151 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in reset_hfcpci()
152 cs->hw.hfcpci.sctrl = 0x40; /* set tx_lo mode, error in datasheet ! */ in reset_hfcpci()
153 Write_hfc(cs, HFCPCI_SCTRL, cs->hw.hfcpci.sctrl); in reset_hfcpci()
154 cs->hw.hfcpci.sctrl_r = 0; in reset_hfcpci()
155 Write_hfc(cs, HFCPCI_SCTRL_R, cs->hw.hfcpci.sctrl_r); in reset_hfcpci()
164 cs->hw.hfcpci.conn = 0x36; /* set data flow directions */ in reset_hfcpci()
165 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in reset_hfcpci()
172 cs->hw.hfcpci.int_m2 = HFCPCI_IRQ_ENABLE; in reset_hfcpci()
173 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in reset_hfcpci()
184 cs->hw.hfcpci.timer.expires = jiffies + 75; in hfcpci_Timer()
237 bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2; in hfcpci_clear_fifo_rx()
238 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2RX; in hfcpci_clear_fifo_rx()
240 bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b1; in hfcpci_clear_fifo_rx()
241 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1RX; in hfcpci_clear_fifo_rx()
244 cs->hw.hfcpci.fifo_en ^= fifo_state; in hfcpci_clear_fifo_rx()
245 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_clear_fifo_rx()
246 cs->hw.hfcpci.last_bfifo_cnt[fifo] = 0; in hfcpci_clear_fifo_rx()
252 cs->hw.hfcpci.fifo_en |= fifo_state; in hfcpci_clear_fifo_rx()
253 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_clear_fifo_rx()
264 bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b2; in hfcpci_clear_fifo_tx()
265 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2TX; in hfcpci_clear_fifo_tx()
267 bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b1; in hfcpci_clear_fifo_tx()
268 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1TX; in hfcpci_clear_fifo_tx()
271 cs->hw.hfcpci.fifo_en ^= fifo_state; in hfcpci_clear_fifo_tx()
272 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_clear_fifo_tx()
278 cs->hw.hfcpci.fifo_en |= fifo_state; in hfcpci_clear_fifo_tx()
279 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_clear_fifo_tx()
359 df = &((fifo_area *) (cs->hw.hfcpci.fifos))->d_chan.d_rx; in receive_dmsg()
485 if ((bcs->channel) && (!cs->hw.hfcpci.bswapped)) { in main_rec_hfcpci()
486 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2; in main_rec_hfcpci()
487 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2; in main_rec_hfcpci()
490 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b1; in main_rec_hfcpci()
491 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b1; in main_rec_hfcpci()
525 if (cs->hw.hfcpci.last_bfifo_cnt[real_fifo] > rcnt + 1) { in main_rec_hfcpci()
529 cs->hw.hfcpci.last_bfifo_cnt[real_fifo] = rcnt; in main_rec_hfcpci()
562 df = &((fifo_area *) (cs->hw.hfcpci.fifos))->d_chan.d_tx; in hfcpci_fill_dfifo()
643 if ((bcs->channel) && (!cs->hw.hfcpci.bswapped)) { in hfcpci_fill_fifo()
644 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b2; in hfcpci_fill_fifo()
645 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txdat_b2; in hfcpci_fill_fifo()
647 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b1; in hfcpci_fill_fifo()
648 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txdat_b1; in hfcpci_fill_fifo()
813 …(!(cs->hw.hfcpci.int_m1 & (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC + HFCPCI_INTS_B1TRANS + HFCPCI_… in hfcpci_auxcmd()
819 cs->hw.hfcpci.sctrl |= SCTRL_MODE_NT; in hfcpci_auxcmd()
820 Write_hfc(cs, HFCPCI_SCTRL, cs->hw.hfcpci.sctrl); /* set NT-mode */ in hfcpci_auxcmd()
825 cs->dc.hfcpci.ph_state = 1; in hfcpci_auxcmd()
826 cs->hw.hfcpci.nt_mode = 1; in hfcpci_auxcmd()
827 cs->hw.hfcpci.nt_timer = 0; in hfcpci_auxcmd()
833 if ((cs->chanlimit > 1) || (cs->hw.hfcpci.bswapped) || in hfcpci_auxcmd()
834 (cs->hw.hfcpci.nt_mode) || (ic->arg != 12)) in hfcpci_auxcmd()
841 cs->hw.hfcpci.trm |= 0x20; /* enable echo chan */ in hfcpci_auxcmd()
842 cs->hw.hfcpci.int_m1 |= HFCPCI_INTS_B2REC; in hfcpci_auxcmd()
843 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2RX; in hfcpci_auxcmd()
846 cs->hw.hfcpci.trm &= ~0x20; /* disable echo chan */ in hfcpci_auxcmd()
847 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_B2REC; in hfcpci_auxcmd()
848 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2RX; in hfcpci_auxcmd()
850 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B2_ENA; in hfcpci_auxcmd()
851 cs->hw.hfcpci.sctrl &= ~SCTRL_B2_ENA; in hfcpci_auxcmd()
852 cs->hw.hfcpci.conn |= 0x10; /* B2-IOM -> B2-ST */ in hfcpci_auxcmd()
853 cs->hw.hfcpci.ctmt &= ~2; in hfcpci_auxcmd()
854 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt); in hfcpci_auxcmd()
855 Write_hfc(cs, HFCPCI_SCTRL_R, cs->hw.hfcpci.sctrl_r); in hfcpci_auxcmd()
856 Write_hfc(cs, HFCPCI_SCTRL, cs->hw.hfcpci.sctrl); in hfcpci_auxcmd()
857 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in hfcpci_auxcmd()
858 Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm); in hfcpci_auxcmd()
859 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in hfcpci_auxcmd()
860 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_auxcmd()
882 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2; in receive_emsg()
883 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2; in receive_emsg()
988 if (!(cs->hw.hfcpci.int_m2 & 0x08)) in hfcpci_interrupt()
1002 val &= cs->hw.hfcpci.int_m1; in hfcpci_interrupt()
1006 debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcpci.ph_state, in hfcpci_interrupt()
1008 cs->dc.hfcpci.ph_state = exval; in hfcpci_interrupt()
1013 if (cs->hw.hfcpci.nt_mode) { in hfcpci_interrupt()
1014 if ((--cs->hw.hfcpci.nt_timer) < 0) in hfcpci_interrupt()
1018 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER); in hfcpci_interrupt()
1024 cs->hw.hfcpci.int_s1 |= val; in hfcpci_interrupt()
1028 if (cs->hw.hfcpci.int_s1 & 0x18) { in hfcpci_interrupt()
1030 val = cs->hw.hfcpci.int_s1; in hfcpci_interrupt()
1031 cs->hw.hfcpci.int_s1 = exval; in hfcpci_interrupt()
1034 if (!(bcs = Sel_BCS(cs, cs->hw.hfcpci.bswapped ? 1 : 0))) { in hfcpci_interrupt()
1050 if (!(bcs = Sel_BCS(cs, cs->hw.hfcpci.bswapped ? 1 : 0))) { in hfcpci_interrupt()
1132 if (cs->hw.hfcpci.int_s1 && count--) { in hfcpci_interrupt()
1133 val = cs->hw.hfcpci.int_s1; in hfcpci_interrupt()
1134 cs->hw.hfcpci.int_s1 = 0; in hfcpci_interrupt()
1226 cs->hw.hfcpci.mst_m |= HFCPCI_MASTER; in HFCPCI_l1hw()
1227 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in HFCPCI_l1hw()
1235 cs->hw.hfcpci.mst_m &= ~HFCPCI_MASTER; in HFCPCI_l1hw()
1236 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in HFCPCI_l1hw()
1239 cs->hw.hfcpci.mst_m |= HFCPCI_MASTER; in HFCPCI_l1hw()
1240 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in HFCPCI_l1hw()
1249 cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~7) | 1; in HFCPCI_l1hw()
1250 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in HFCPCI_l1hw()
1259 cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~0x38) | 0x08; in HFCPCI_l1hw()
1260 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in HFCPCI_l1hw()
1271 cs->hw.hfcpci.trm |= 0x80; /* enable IOM-loop */ in HFCPCI_l1hw()
1272 Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm); in HFCPCI_l1hw()
1325 cs->hw.hfcpci.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1326 cs->hw.hfcpci.sctrl_e &= ~0x80; in mode_hfcpci()
1330 cs->hw.hfcpci.bswapped = 1; /* B1 and B2 exchanged */ in mode_hfcpci()
1331 cs->hw.hfcpci.sctrl_e |= 0x80; in mode_hfcpci()
1333 cs->hw.hfcpci.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1334 cs->hw.hfcpci.sctrl_e &= ~0x80; in mode_hfcpci()
1338 cs->hw.hfcpci.bswapped = 0; /* B1 and B2 normal mode */ in mode_hfcpci()
1339 cs->hw.hfcpci.sctrl_e &= ~0x80; in mode_hfcpci()
1345 cs->hw.hfcpci.sctrl &= ~SCTRL_B2_ENA; in mode_hfcpci()
1346 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B2_ENA; in mode_hfcpci()
1348 cs->hw.hfcpci.sctrl &= ~SCTRL_B1_ENA; in mode_hfcpci()
1349 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B1_ENA; in mode_hfcpci()
1352 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2; in mode_hfcpci()
1353 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); in mode_hfcpci()
1355 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1; in mode_hfcpci()
1356 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); in mode_hfcpci()
1363 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1364 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1366 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1367 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1370 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1371 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); in mode_hfcpci()
1372 cs->hw.hfcpci.ctmt |= 2; in mode_hfcpci()
1373 cs->hw.hfcpci.conn &= ~0x18; in mode_hfcpci()
1375 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1376 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); in mode_hfcpci()
1377 cs->hw.hfcpci.ctmt |= 1; in mode_hfcpci()
1378 cs->hw.hfcpci.conn &= ~0x03; in mode_hfcpci()
1385 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1386 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1388 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1389 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1392 cs->hw.hfcpci.last_bfifo_cnt[1] = 0; in mode_hfcpci()
1393 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2; in mode_hfcpci()
1394 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); in mode_hfcpci()
1395 cs->hw.hfcpci.ctmt &= ~2; in mode_hfcpci()
1396 cs->hw.hfcpci.conn &= ~0x18; in mode_hfcpci()
1398 cs->hw.hfcpci.last_bfifo_cnt[0] = 0; in mode_hfcpci()
1399 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1; in mode_hfcpci()
1400 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); in mode_hfcpci()
1401 cs->hw.hfcpci.ctmt &= ~1; in mode_hfcpci()
1402 cs->hw.hfcpci.conn &= ~0x03; in mode_hfcpci()
1407 cs->hw.hfcpci.conn |= 0x10; in mode_hfcpci()
1408 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA; in mode_hfcpci()
1409 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA; in mode_hfcpci()
1410 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2; in mode_hfcpci()
1411 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); in mode_hfcpci()
1413 cs->hw.hfcpci.conn |= 0x02; in mode_hfcpci()
1414 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA; in mode_hfcpci()
1415 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA; in mode_hfcpci()
1416 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1; in mode_hfcpci()
1417 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); in mode_hfcpci()
1421 Write_hfc(cs, HFCPCI_SCTRL_E, cs->hw.hfcpci.sctrl_e); in mode_hfcpci()
1422 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in mode_hfcpci()
1423 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); in mode_hfcpci()
1424 Write_hfc(cs, HFCPCI_SCTRL, cs->hw.hfcpci.sctrl); in mode_hfcpci()
1425 Write_hfc(cs, HFCPCI_SCTRL_R, cs->hw.hfcpci.sctrl_r); in mode_hfcpci()
1426 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt); in mode_hfcpci()
1427 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn); in mode_hfcpci()
1554 if (!cs->hw.hfcpci.nt_mode) in hfcpci_bh()
1555 switch (cs->dc.hfcpci.ph_state) { in hfcpci_bh()
1574 switch (cs->dc.hfcpci.ph_state) { in hfcpci_bh()
1578 if (cs->hw.hfcpci.nt_timer < 0) { in hfcpci_bh()
1579 cs->hw.hfcpci.nt_timer = 0; in hfcpci_bh()
1580 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER; in hfcpci_bh()
1581 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_bh()
1588 cs->dc.hfcpci.ph_state = 4; in hfcpci_bh()
1590 cs->hw.hfcpci.int_m1 |= HFCPCI_INTS_TIMER; in hfcpci_bh()
1591 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_bh()
1592 cs->hw.hfcpci.ctmt &= ~HFCPCI_AUTO_TIMER; in hfcpci_bh()
1593 cs->hw.hfcpci.ctmt |= HFCPCI_TIM3_125; in hfcpci_bh()
1594 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER); in hfcpci_bh()
1595 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER); in hfcpci_bh()
1596 cs->hw.hfcpci.nt_timer = NT_T1_COUNT; in hfcpci_bh()
1606 cs->hw.hfcpci.nt_timer = 0; in hfcpci_bh()
1607 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER; in hfcpci_bh()
1608 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_bh()
1669 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER; in hfcpci_card_msg()
1670 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in hfcpci_card_msg()
1672 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); in hfcpci_card_msg()
1701 cs->hw.hfcpci.int_s1 = 0; in setup_hfcpci()
1702 cs->dc.hfcpci.ph_state = 0; in setup_hfcpci()
1703 cs->hw.hfcpci.fifo = 255; in setup_hfcpci()
1725 cs->hw.hfcpci.pci_bus = dev_hfcpci->bus->number; in setup_hfcpci()
1726 cs->hw.hfcpci.pci_device_fn = dev_hfcpci->devfn; in setup_hfcpci()
1732 cs->hw.hfcpci.pci_io = (char *) dev_hfcpci->resource[ 1].start; in setup_hfcpci()
1738 if (!cs->hw.hfcpci.pci_io) { in setup_hfcpci()
1745 if (!(cs->hw.hfcpci.share_start = kmalloc(65536, GFP_KERNEL))) { in setup_hfcpci()
1749 cs->hw.hfcpci.fifos = (void *) in setup_hfcpci()
1750 (((ulong) cs->hw.hfcpci.share_start) & ~0x7FFF) + 0x8000; in setup_hfcpci()
1751 pcibios_write_config_dword(cs->hw.hfcpci.pci_bus, in setup_hfcpci()
1752 cs->hw.hfcpci.pci_device_fn, 0x80, in setup_hfcpci()
1753 (u_int) virt_to_bus(cs->hw.hfcpci.fifos)); in setup_hfcpci()
1754 cs->hw.hfcpci.pci_io = ioremap((ulong) cs->hw.hfcpci.pci_io, 256); in setup_hfcpci()
1757 (u_int) cs->hw.hfcpci.pci_io, in setup_hfcpci()
1758 (u_int) cs->hw.hfcpci.fifos, in setup_hfcpci()
1759 (u_int) virt_to_bus(cs->hw.hfcpci.fifos), in setup_hfcpci()
1761 …pcibios_write_config_word(cs->hw.hfcpci.pci_bus, cs->hw.hfcpci.pci_device_fn, PCI_COMMAND, PCI_ENA… in setup_hfcpci()
1762 cs->hw.hfcpci.int_m2 = 0; /* disable alle interrupts */ in setup_hfcpci()
1763 cs->hw.hfcpci.int_m1 = 0; in setup_hfcpci()
1764 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); in setup_hfcpci()
1765 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in setup_hfcpci()
1781 cs->hw.hfcpci.timer.function = (void *) hfcpci_Timer; in setup_hfcpci()
1782 cs->hw.hfcpci.timer.data = (long) cs; in setup_hfcpci()
1783 init_timer(&cs->hw.hfcpci.timer); in setup_hfcpci()