Lines Matching refs:bcs
192 if (cs->bcs[0].mode && (cs->bcs[0].channel == channel)) in Sel_BCS()
193 return(&cs->bcs[0]); in Sel_BCS()
194 else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel)) in Sel_BCS()
195 return(&cs->bcs[1]); in Sel_BCS()
201 hdlc_sched_event(struct BCState *bcs, int event) in hdlc_sched_event() argument
203 bcs->event |= 1 << event; in hdlc_sched_event()
204 queue_task(&bcs->tqueue, &tq_immediate); in hdlc_sched_event()
209 write_ctrl(struct BCState *bcs, int which) { in write_ctrl() argument
211 if (bcs->cs->debug & L1_DEB_HSCX) in write_ctrl()
212 debugl1(bcs->cs, "hdlc %c wr%x ctrl %x", in write_ctrl()
213 'A' + bcs->channel, which, bcs->hw.hdlc.ctrl.ctrl); in write_ctrl()
214 if (bcs->cs->subtyp == AVM_FRITZ_PCI) { in write_ctrl()
215 WriteHDLCPCI(bcs->cs, bcs->channel, HDLC_STATUS, bcs->hw.hdlc.ctrl.ctrl); in write_ctrl()
218 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 2, in write_ctrl()
219 bcs->hw.hdlc.ctrl.sr.mode); in write_ctrl()
221 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 1, in write_ctrl()
222 bcs->hw.hdlc.ctrl.sr.xml); in write_ctrl()
224 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS, in write_ctrl()
225 bcs->hw.hdlc.ctrl.sr.cmd); in write_ctrl()
230 modehdlc(struct BCState *bcs, int mode, int bc) in modehdlc() argument
232 struct IsdnCardState *cs = bcs->cs; in modehdlc()
233 int hdlc = bcs->channel; in modehdlc()
237 'A' + hdlc, bcs->mode, mode, hdlc, bc); in modehdlc()
238 bcs->hw.hdlc.ctrl.ctrl = 0; in modehdlc()
241 bcs->mode = 1; in modehdlc()
242 bcs->channel = bc; in modehdlc()
245 if (bcs->mode == L1_MODE_NULL) in modehdlc()
247 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS; in modehdlc()
248 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS; in modehdlc()
249 write_ctrl(bcs, 5); in modehdlc()
250 bcs->mode = L1_MODE_NULL; in modehdlc()
251 bcs->channel = bc; in modehdlc()
254 bcs->mode = mode; in modehdlc()
255 bcs->channel = bc; in modehdlc()
256 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS; in modehdlc()
257 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS; in modehdlc()
258 write_ctrl(bcs, 5); in modehdlc()
259 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS; in modehdlc()
260 write_ctrl(bcs, 1); in modehdlc()
261 bcs->hw.hdlc.ctrl.sr.cmd = 0; in modehdlc()
262 hdlc_sched_event(bcs, B_XMTBUFREADY); in modehdlc()
265 bcs->mode = mode; in modehdlc()
266 bcs->channel = bc; in modehdlc()
267 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS; in modehdlc()
268 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_ITF_FLG; in modehdlc()
269 write_ctrl(bcs, 5); in modehdlc()
270 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS; in modehdlc()
271 write_ctrl(bcs, 1); in modehdlc()
272 bcs->hw.hdlc.ctrl.sr.cmd = 0; in modehdlc()
273 hdlc_sched_event(bcs, B_XMTBUFREADY); in modehdlc()
279 hdlc_empty_fifo(struct BCState *bcs, int count) in hdlc_empty_fifo() argument
283 u_char idx = bcs->channel ? AVM_HDLC_2 : AVM_HDLC_1; in hdlc_empty_fifo()
285 struct IsdnCardState *cs = bcs->cs; in hdlc_empty_fifo()
289 if (bcs->hw.hdlc.rcvidx + count > HSCX_BUFMAX) { in hdlc_empty_fifo()
294 p = bcs->hw.hdlc.rcvbuf + bcs->hw.hdlc.rcvidx; in hdlc_empty_fifo()
296 bcs->hw.hdlc.rcvidx += count; in hdlc_empty_fifo()
319 char *t = bcs->blog; in hdlc_empty_fifo()
324 bcs->channel ? 'B' : 'A', count); in hdlc_empty_fifo()
326 debugl1(cs, bcs->blog); in hdlc_empty_fifo()
331 hdlc_fill_fifo(struct BCState *bcs) in hdlc_fill_fifo() argument
333 struct IsdnCardState *cs = bcs->cs; in hdlc_fill_fifo()
341 if (!bcs->tx_skb) in hdlc_fill_fifo()
343 if (bcs->tx_skb->len <= 0) in hdlc_fill_fifo()
346 bcs->hw.hdlc.ctrl.sr.cmd &= ~HDLC_CMD_XME; in hdlc_fill_fifo()
347 if (bcs->tx_skb->len > fifo_size) { in hdlc_fill_fifo()
350 count = bcs->tx_skb->len; in hdlc_fill_fifo()
351 if (bcs->mode != L1_MODE_TRANS) in hdlc_fill_fifo()
352 bcs->hw.hdlc.ctrl.sr.cmd |= HDLC_CMD_XME; in hdlc_fill_fifo()
355 debugl1(cs, "hdlc_fill_fifo %d/%ld", count, bcs->tx_skb->len); in hdlc_fill_fifo()
356 p = bcs->tx_skb->data; in hdlc_fill_fifo()
358 skb_pull(bcs->tx_skb, count); in hdlc_fill_fifo()
359 bcs->tx_cnt -= count; in hdlc_fill_fifo()
360 bcs->hw.hdlc.count += count; in hdlc_fill_fifo()
361 bcs->hw.hdlc.ctrl.sr.xml = ((count == fifo_size) ? 0 : count); in hdlc_fill_fifo()
362 write_ctrl(bcs, 3); /* sets the correct index too */ in hdlc_fill_fifo()
383 char *t = bcs->blog; in hdlc_fill_fifo()
388 bcs->channel ? 'B' : 'A', count); in hdlc_fill_fifo()
390 debugl1(cs, bcs->blog); in hdlc_fill_fifo()
395 fill_hdlc(struct BCState *bcs) in fill_hdlc() argument
400 hdlc_fill_fifo(bcs); in fill_hdlc()
405 HDLC_irq(struct BCState *bcs, u_int stat) { in HDLC_irq() argument
409 if (bcs->cs->debug & L1_DEB_HSCX) in HDLC_irq()
410 debugl1(bcs->cs, "ch%d stat %#x", bcs->channel, stat); in HDLC_irq()
413 if (bcs->cs->debug & L1_DEB_HSCX) in HDLC_irq()
414 debugl1(bcs->cs, "RDO"); in HDLC_irq()
416 debugl1(bcs->cs, "ch%d stat %#x", bcs->channel, stat); in HDLC_irq()
417 bcs->hw.hdlc.ctrl.sr.xml = 0; in HDLC_irq()
418 bcs->hw.hdlc.ctrl.sr.cmd |= HDLC_CMD_RRS; in HDLC_irq()
419 write_ctrl(bcs, 1); in HDLC_irq()
420 bcs->hw.hdlc.ctrl.sr.cmd &= ~HDLC_CMD_RRS; in HDLC_irq()
421 write_ctrl(bcs, 1); in HDLC_irq()
422 bcs->hw.hdlc.rcvidx = 0; in HDLC_irq()
426 hdlc_empty_fifo(bcs, len); in HDLC_irq()
427 if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) { in HDLC_irq()
429 (bcs->mode == L1_MODE_TRANS)) { in HDLC_irq()
430 if (!(skb = dev_alloc_skb(bcs->hw.hdlc.rcvidx))) in HDLC_irq()
433 memcpy(skb_put(skb, bcs->hw.hdlc.rcvidx), in HDLC_irq()
434 bcs->hw.hdlc.rcvbuf, bcs->hw.hdlc.rcvidx); in HDLC_irq()
435 skb_queue_tail(&bcs->rqueue, skb); in HDLC_irq()
437 bcs->hw.hdlc.rcvidx = 0; in HDLC_irq()
438 hdlc_sched_event(bcs, B_RCVBUFREADY); in HDLC_irq()
440 if (bcs->cs->debug & L1_DEB_HSCX) in HDLC_irq()
441 debugl1(bcs->cs, "invalid frame"); in HDLC_irq()
443 debugl1(bcs->cs, "ch%d invalid frame %#x", bcs->channel, stat); in HDLC_irq()
444 bcs->hw.hdlc.rcvidx = 0; in HDLC_irq()
453 if (bcs->tx_skb) { in HDLC_irq()
454 skb_push(bcs->tx_skb, bcs->hw.hdlc.count); in HDLC_irq()
455 bcs->tx_cnt += bcs->hw.hdlc.count; in HDLC_irq()
456 bcs->hw.hdlc.count = 0; in HDLC_irq()
458 if (bcs->cs->debug & L1_DEB_WARN) in HDLC_irq()
459 debugl1(bcs->cs, "ch%d XDU", bcs->channel); in HDLC_irq()
460 } else if (bcs->cs->debug & L1_DEB_WARN) in HDLC_irq()
461 debugl1(bcs->cs, "ch%d XDU without skb", bcs->channel); in HDLC_irq()
462 bcs->hw.hdlc.ctrl.sr.xml = 0; in HDLC_irq()
463 bcs->hw.hdlc.ctrl.sr.cmd |= HDLC_CMD_XRS; in HDLC_irq()
464 write_ctrl(bcs, 1); in HDLC_irq()
465 bcs->hw.hdlc.ctrl.sr.cmd &= ~HDLC_CMD_XRS; in HDLC_irq()
466 write_ctrl(bcs, 1); in HDLC_irq()
467 hdlc_fill_fifo(bcs); in HDLC_irq()
469 if (bcs->tx_skb) { in HDLC_irq()
470 if (bcs->tx_skb->len) { in HDLC_irq()
471 hdlc_fill_fifo(bcs); in HDLC_irq()
474 if (bcs->st->lli.l1writewakeup && in HDLC_irq()
475 (PACKET_NOACK != bcs->tx_skb->pkt_type)) in HDLC_irq()
476 bcs->st->lli.l1writewakeup(bcs->st, bcs->hw.hdlc.count); in HDLC_irq()
477 dev_kfree_skb_irq(bcs->tx_skb); in HDLC_irq()
478 bcs->hw.hdlc.count = 0; in HDLC_irq()
479 bcs->tx_skb = NULL; in HDLC_irq()
482 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) { in HDLC_irq()
483 bcs->hw.hdlc.count = 0; in HDLC_irq()
484 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); in HDLC_irq()
485 hdlc_fill_fifo(bcs); in HDLC_irq()
487 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in HDLC_irq()
488 hdlc_sched_event(bcs, B_XMTBUFREADY); in HDLC_irq()
498 struct BCState *bcs; in HDLC_irq_main() local
510 if (!(bcs = Sel_BCS(cs, 0))) { in HDLC_irq_main()
514 HDLC_irq(bcs, stat); in HDLC_irq_main()
524 if (!(bcs = Sel_BCS(cs, 1))) { in HDLC_irq_main()
528 HDLC_irq(bcs, stat); in HDLC_irq_main()
543 if (st->l1.bcs->tx_skb) { in hdlc_l2l1()
544 skb_queue_tail(&st->l1.bcs->squeue, skb); in hdlc_l2l1()
547 st->l1.bcs->tx_skb = skb; in hdlc_l2l1()
548 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag); in hdlc_l2l1()
549 st->l1.bcs->hw.hdlc.count = 0; in hdlc_l2l1()
551 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs); in hdlc_l2l1()
555 if (st->l1.bcs->tx_skb) { in hdlc_l2l1()
559 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag); in hdlc_l2l1()
560 st->l1.bcs->tx_skb = skb; in hdlc_l2l1()
561 st->l1.bcs->hw.hdlc.count = 0; in hdlc_l2l1()
562 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs); in hdlc_l2l1()
565 if (!st->l1.bcs->tx_skb) { in hdlc_l2l1()
572 test_and_set_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag); in hdlc_l2l1()
573 modehdlc(st->l1.bcs, st->l1.mode, st->l1.bc); in hdlc_l2l1()
580 test_and_clear_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag); in hdlc_l2l1()
581 test_and_clear_bit(BC_FLG_BUSY, &st->l1.bcs->Flag); in hdlc_l2l1()
582 modehdlc(st->l1.bcs, 0, st->l1.bc); in hdlc_l2l1()
589 close_hdlcstate(struct BCState *bcs) in close_hdlcstate() argument
591 modehdlc(bcs, 0, 0); in close_hdlcstate()
592 if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) { in close_hdlcstate()
593 if (bcs->hw.hdlc.rcvbuf) { in close_hdlcstate()
594 kfree(bcs->hw.hdlc.rcvbuf); in close_hdlcstate()
595 bcs->hw.hdlc.rcvbuf = NULL; in close_hdlcstate()
597 if (bcs->blog) { in close_hdlcstate()
598 kfree(bcs->blog); in close_hdlcstate()
599 bcs->blog = NULL; in close_hdlcstate()
601 skb_queue_purge(&bcs->rqueue); in close_hdlcstate()
602 skb_queue_purge(&bcs->squeue); in close_hdlcstate()
603 if (bcs->tx_skb) { in close_hdlcstate()
604 dev_kfree_skb_any(bcs->tx_skb); in close_hdlcstate()
605 bcs->tx_skb = NULL; in close_hdlcstate()
606 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in close_hdlcstate()
612 open_hdlcstate(struct IsdnCardState *cs, struct BCState *bcs) in open_hdlcstate() argument
614 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) { in open_hdlcstate()
615 if (!(bcs->hw.hdlc.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) { in open_hdlcstate()
620 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) { in open_hdlcstate()
623 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag); in open_hdlcstate()
624 kfree(bcs->hw.hdlc.rcvbuf); in open_hdlcstate()
625 bcs->hw.hdlc.rcvbuf = NULL; in open_hdlcstate()
628 skb_queue_head_init(&bcs->rqueue); in open_hdlcstate()
629 skb_queue_head_init(&bcs->squeue); in open_hdlcstate()
631 bcs->tx_skb = NULL; in open_hdlcstate()
632 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); in open_hdlcstate()
633 bcs->event = 0; in open_hdlcstate()
634 bcs->hw.hdlc.rcvidx = 0; in open_hdlcstate()
635 bcs->tx_cnt = 0; in open_hdlcstate()
640 setstack_hdlc(struct PStack *st, struct BCState *bcs) in setstack_hdlc() argument
642 bcs->channel = st->l1.bc; in setstack_hdlc()
643 if (open_hdlcstate(st->l1.hardware, bcs)) in setstack_hdlc()
645 st->l1.bcs = bcs; in setstack_hdlc()
648 bcs->st = st; in setstack_hdlc()
686 cs->bcs[0].BC_SetStack = setstack_hdlc; in inithdlc()
687 cs->bcs[1].BC_SetStack = setstack_hdlc; in inithdlc()
688 cs->bcs[0].BC_Close = close_hdlcstate; in inithdlc()
689 cs->bcs[1].BC_Close = close_hdlcstate; in inithdlc()
690 modehdlc(cs->bcs, -1, 0); in inithdlc()
691 modehdlc(cs->bcs + 1, -1, 1); in inithdlc()