120 	byte *DivasIOBase, *PLXIOBase;  in diva_server_bri_start()  local
170 	PLXIOBase = UxCardMemAttach(card->hw, PLX_IOBASE);  in diva_server_bri_start()
172 	bPLX9060 = UxCardPortIoInW(card->hw, PLXIOBase, 0x6C) | UxCardPortIoInW(card->hw, PLXIOBase, 0x6E);  in diva_server_bri_start()
176 		dwSerialNum = (UxCardPortIoInW(card->hw, PLXIOBase, 0x1E) << 16) |   in diva_server_bri_start()
177 					(UxCardPortIoInW(card->hw, PLXIOBase, 0x22));  in diva_server_bri_start()
182 		dwSerialNum = (UxCardPortIoInW(card->hw, PLXIOBase, 0x22) << 16) |   in diva_server_bri_start()
183 					(UxCardPortIoInW(card->hw, PLXIOBase, 0x26));  in diva_server_bri_start()
187 	UxCardMemDetach(card->hw, PLXIOBase);  in diva_server_bri_start()
432 	dword	PLXIOBase = 0;  in DivasBriPatch()  local
435 	PLXIOBase = card->cfg.reset_base;  in DivasBriPatch()
444 	if (PLXIOBase == 0)  in DivasBriPatch()
452 	DPRINTF(("Divas: PLX I/O Base 0x%x", PLXIOBase));  in DivasBriPatch()
455 	if (PLXIOBase & 0x80)  in DivasBriPatch()
465 		PLXIOBase &= ~0x80;  in DivasBriPatch()
466 		UxPciConfigWrite(card->hw, 4, PCI_BADDR1, &PLXIOBase);  in DivasBriPatch()
474 		DivasIOBase = PLXIOBase + dwSize;  in DivasBriPatch()
476 		card->cfg.reset_base = PLXIOBase;  in DivasBriPatch()
527 	DPRINTF(("Divas: PLX I/O Base 0x%x", PLXIOBase));  in DivasBriPatch()
537 	byte *PLXIOBase = NULL, *DivasIOBase = NULL;  in diva_server_bri_test_int()  local
541 	PLXIOBase = UxCardMemAttach(card->hw, PLX_IOBASE);  in diva_server_bri_test_int()
543 …bPLX9060 = UxCardPortIoInW(card->hw, PLXIOBase, 0x6C) || UxCardPortIoInW(card->hw, PLXIOBase, 0x6E…  in diva_server_bri_test_int()
547 		UxCardPortIoOut(card->hw, PLXIOBase, 0x69, 0x09);  in diva_server_bri_test_int()
551 		UxCardPortIoOut(card->hw, PLXIOBase, 0x4C, 0x41);  in diva_server_bri_test_int()
556 	UxCardMemDetach(card->hw, PLXIOBase);  in diva_server_bri_test_int()