41 	u8  reg44 = 0, reg47 = 0, reg48 = 0, reg4a = 0, reg4b = 0;  in slc90e66_get_info()  local
48 	pci_read_config_byte(bmide_dev, 0x4a, &reg4a);  in slc90e66_get_info()
85 			((reg4a&0x04)==0x04) ? "4" :  in slc90e66_get_info()
86 			((reg4a&0x03)==0x03) ? "3" :  in slc90e66_get_info()
87 			(reg4a&0x02) ? "2" :  in slc90e66_get_info()
88 			(reg4a&0x01) ? "1" :  in slc90e66_get_info()
89 			(reg4a&0x00) ? "0" : "X",  in slc90e66_get_info()
90 			((reg4a&0x40)==0x40) ? "4" :  in slc90e66_get_info()
91 			((reg4a&0x30)==0x30) ? "3" :  in slc90e66_get_info()
92 			(reg4a&0x20) ? "2" :  in slc90e66_get_info()
93 			(reg4a&0x10) ? "1" :  in slc90e66_get_info()
94 			(reg4a&0x00) ? "0" : "X",  in slc90e66_get_info()
211 	u16			reg4042, reg44, reg48, reg4a;  in slc90e66_tune_chipset()  local
217 	pci_read_config_word(dev, 0x4a, &reg4a);  in slc90e66_tune_chipset()
240 		if ((reg4a & u_speed) != u_speed) {  in slc90e66_tune_chipset()
241 			pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);  in slc90e66_tune_chipset()
242 			pci_read_config_word(dev, 0x4a, &reg4a);  in slc90e66_tune_chipset()
243 			pci_write_config_word(dev, 0x4a, reg4a|u_speed);  in slc90e66_tune_chipset()
248 		if (reg4a & a_speed)  in slc90e66_tune_chipset()
249 			pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);  in slc90e66_tune_chipset()