205 	ide_hwif_t *hwif	= HWIF(drive);  in aec62xx_ratemask()  local
208 	switch(hwif->pci_dev->device) {  in aec62xx_ratemask()
212 			mode = (hwif->INB(hwif->dma_master) & 0x10) ? 4 : 3;  in aec62xx_ratemask()
214 			mode = (hwif->INB(((hwif->channel) ?  in aec62xx_ratemask()
215 					hwif->mate->dma_status :  in aec62xx_ratemask()
216 					hwif->dma_status)) & 0x10) ? 4 : 3;  in aec62xx_ratemask()
235 	ide_hwif_t *hwif	= HWIF(drive);  in aec6210_tune_chipset()  local
236 	struct pci_dev *dev	= hwif->pci_dev;  in aec6210_tune_chipset()
263 	ide_hwif_t *hwif	= HWIF(drive);  in aec6260_tune_chipset()  local
264 	struct pci_dev *dev	= hwif->pci_dev;  in aec6260_tune_chipset()
276 	pci_read_config_byte(dev, (0x44|hwif->channel), &ultra);  in aec6260_tune_chipset()
280 	pci_write_config_byte(dev, (0x44|hwif->channel), tmp2);  in aec6260_tune_chipset()
329 	ide_hwif_t *hwif	= HWIF(drive);  in aec62xx_config_drive_xfer_rate()  local
334 		if (hwif->ide_dma_bad_drive(drive))  in aec62xx_config_drive_xfer_rate()
337 			if (id->dma_ultra & hwif->ultra_mask) {  in aec62xx_config_drive_xfer_rate()
345 			if ((id->dma_mword & hwif->mwdma_mask) ||  in aec62xx_config_drive_xfer_rate()
346 			    (id->dma_1word & hwif->swdma_mask)) {  in aec62xx_config_drive_xfer_rate()
351 		} else if (hwif->ide_dma_good_drive(drive) &&  in aec62xx_config_drive_xfer_rate()
359 		return hwif->ide_dma_on(drive);  in aec62xx_config_drive_xfer_rate()
364 		return hwif->ide_dma_off_quietly(drive);  in aec62xx_config_drive_xfer_rate()
372 	ide_hwif_t *hwif	= HWIF(drive);  in aec62xx_irq_timeout()  local
373 	struct pci_dev *dev	= hwif->pci_dev;  in aec62xx_irq_timeout()
397 		ide_hwif_t *hwif	= HWIF(drive);  in aec62xx_irq_timeout()
398 		struct pci_dev *dev	= hwif->pci_dev;  in aec62xx_irq_timeout()
404 		mode6 = HWIF(drive)->INB(((hwif->channel) ?  in aec62xx_irq_timeout()
405 					   hwif->mate->dma_status :  in aec62xx_irq_timeout()
406 					   hwif->dma_status));  in aec62xx_irq_timeout()
439 static void __init init_hwif_aec62xx (ide_hwif_t *hwif)  in init_hwif_aec62xx()  argument
441 	hwif->autodma = 0;  in init_hwif_aec62xx()
442 	hwif->tuneproc = &aec62xx_tune_drive;  in init_hwif_aec62xx()
443 	hwif->speedproc = &aec62xx_tune_chipset;  in init_hwif_aec62xx()
445 	if (hwif->pci_dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {  in init_hwif_aec62xx()
446 		hwif->serialized = hwif->channel;  in init_hwif_aec62xx()
447 		hwif->no_dsc = 1;  in init_hwif_aec62xx()
450 	if (hwif->mate)  in init_hwif_aec62xx()
451 		hwif->mate->serialized = hwif->serialized;  in init_hwif_aec62xx()
453 	if (!hwif->dma_base) {  in init_hwif_aec62xx()
454 		hwif->drives[0].autotune = 1;  in init_hwif_aec62xx()
455 		hwif->drives[1].autotune = 1;  in init_hwif_aec62xx()
459 	hwif->ultra_mask = 0x7f;  in init_hwif_aec62xx()
460 	hwif->mwdma_mask = 0x07;  in init_hwif_aec62xx()
461 	hwif->swdma_mask = 0x07;  in init_hwif_aec62xx()
463 	hwif->ide_dma_check	= &aec62xx_config_drive_xfer_rate;  in init_hwif_aec62xx()
464 	hwif->ide_dma_lostirq	= &aec62xx_irq_timeout;  in init_hwif_aec62xx()
465 	hwif->ide_dma_timeout	= &aec62xx_irq_timeout;  in init_hwif_aec62xx()
467 		hwif->autodma = 1;  in init_hwif_aec62xx()
468 	hwif->drives[0].autodma = hwif->autodma;  in init_hwif_aec62xx()
469 	hwif->drives[1].autodma = hwif->autodma;  in init_hwif_aec62xx()
472 static void __init init_dma_aec62xx (ide_hwif_t *hwif, unsigned long dmabase)  in init_dma_aec62xx()  argument
474 	struct pci_dev *dev	= hwif->pci_dev;  in init_dma_aec62xx()
482 		pci_write_config_byte(dev, 0x54, reg54h & ~(hwif->channel ? 0xF0 : 0x0F));  in init_dma_aec62xx()
486 		pci_read_config_byte(hwif->pci_dev, 0x49, &ata66);  in init_dma_aec62xx()
487 	        if (!(hwif->udma_four))  in init_dma_aec62xx()
488 			hwif->udma_four = (ata66&(hwif->channel?0x02:0x01))?0:1;  in init_dma_aec62xx()
491 	ide_setup_dma(hwif, dmabase, 8);  in init_dma_aec62xx()