Lines Matching refs:INT_AND_DMA_REG
245 SCCwrite(INT_AND_DMA_REG, 0); in mvme147_scc_init()
272 SCCwrite(INT_AND_DMA_REG, 0); in mvme147_scc_init()
315 SCCwrite(INT_AND_DMA_REG, 0); in mvme162_scc_init()
343 SCCwrite(INT_AND_DMA_REG, 0); in mvme162_scc_init()
383 SCCwrite(INT_AND_DMA_REG, 0); in bvme6000_scc_init()
411 SCCwrite(INT_AND_DMA_REG, 0); in bvme6000_scc_init()
545 SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0); in scc_tx_int()
568 SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0); in scc_tx_int()
626 SCCmod(INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0); in scc_disable_tx_interrupts()
640 SCCmod(INT_AND_DMA_REG, 0xff, IDR_TX_INT_ENAB); in scc_enable_tx_interrupts()
655 SCCmod(INT_AND_DMA_REG, in scc_disable_rx_interrupts()
669 SCCmod(INT_AND_DMA_REG, 0xff, in scc_enable_rx_interrupts()
863 { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB }, in scc_open()
892 { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB }, in scc_open()