Lines Matching refs:BIT3
342 #define PVR_AUTOCTS BIT3
915 #define CMD_TXFIFO BIT3 // release current tx FIFO
1432 if (gis & (BIT3 + BIT2)) in mgslpc_isr()
3598 val |= BIT3; in hdlc_mode()
3607 val |= BIT4 + BIT3; in hdlc_mode()
3738 set_reg_bits(info, CHA + PVR, BIT3); in hdlc_mode()
3740 clear_reg_bits(info, CHA + PVR, BIT3); in hdlc_mode()
3775 clear_reg_bits(info, CHA + MODE, BIT3); in rx_stop()
3792 set_reg_bits(info, CHA + MODE, BIT3); in rx_start()
4008 val |= BIT3; in async_mode()
4052 set_reg_bits(info, CHA + MODE, BIT3); in async_mode()
4057 set_reg_bits(info, CHA + PVR, BIT3); in async_mode()
4059 clear_reg_bits(info, CHA + PVR, BIT3); in async_mode()
4074 set_reg_bits(info, CHA + CCR1, BIT3); in tx_set_idle()
4076 clear_reg_bits(info, CHA + CCR1, BIT3); in tx_set_idle()