Lines Matching refs:g1
41 ldxa [%g1 + %g1] ASI_DMMU, %g4 ! Get TAG_ACCESS
52 mov TSB_REG, %g1 ! Grab TSB reg
53 ldxa [%g1] ASI_DMMU, %g5 ! Doing PGD caching?
54 srlx %g6, (TLB_PMD_SHIFT - 1), %g1 ! Position PMD offset
56 and %g1, TLB_PMD_MASK, %g1 ! Mask PMD offset bits
58 add %g1, %g1, %g1 ! Position PMD offset some more
68 lduwa [%g5 + %g1] ASI_PHYS_USE_EC, %g5! Load PMD
73 FILL_VALID_SZ_BITS1(%g1) ! Put _PAGE_VALID into %g1
74 FILL_VALID_SZ_BITS2(%g1) ! Put _PAGE_VALID into %g1
76 or %g5, %g1, %g5 ! ...
77 mov TLB_SFSR, %g1 ! Restore %g1 value
79 stxa %g4, [%g1 + %g1] ASI_DMMU ! Restore previous TAG_ACCESS