23 #define PCI_REG(reg)        (SH7751_PCIREG_BASE+reg)  macro
42 	if(inl(PCI_REG(SH7751_PCICONF0)) !=  in pcibios_init_platform()
50 	outl(0, PCI_REG(SH7751_PCICLKR));  in pcibios_init_platform()
53 	outl(word, PCI_REG(SH7751_PCICLKR));  in pcibios_init_platform()
57 	outl(word,PCI_REG(SH7751_PCICR));      in pcibios_init_platform()
61 	outl(word,PCI_REG(SH7751_PCICR));   in pcibios_init_platform()
69 	outl(word, PCI_REG(SH7751_PCICONF1));  in pcibios_init_platform()
73 	outl(word, PCI_REG(SH7751_PCICONF2));  in pcibios_init_platform()
81 	outl(word, PCI_REG(SH7751_PCILSR0));  in pcibios_init_platform()
83 	outl(word, PCI_REG(SH7751_PCILSR1));  in pcibios_init_platform()
86 	outl(word, PCI_REG(SH7751_PCILAR0));  in pcibios_init_platform()
87 	outl(word, PCI_REG(SH7751_PCICONF5));  in pcibios_init_platform()
90 	outl(word, PCI_REG(SH7751_PCILAR1));  in pcibios_init_platform()
91 	outl(word, PCI_REG(SH7751_PCICONF6));  in pcibios_init_platform()
98 	outl(word , PCI_REG(SH7751_PCIMBR));  in pcibios_init_platform()
112 	outl(word, PCI_REG(SH7751_PCIIOBR));  in pcibios_init_platform()
121 	outl(word, PCI_REG(SH7751_PCIBCR1));  in pcibios_init_platform()
128 	outl(word, PCI_REG(SH7751_PCIBCR2));  in pcibios_init_platform()
131 	outl(word, PCI_REG(SH7751_PCIWCR1));  in pcibios_init_platform()
133 	outl(word, PCI_REG(SH7751_PCIWCR2));  in pcibios_init_platform()
135 	outl(word, PCI_REG(SH7751_PCIWCR3));  in pcibios_init_platform()
137 	outl(word, PCI_REG(SH7751_PCIMCR));  in pcibios_init_platform()
146 	outl(word,PCI_REG(SH7751_PCICR));   in pcibios_init_platform()