Lines Matching refs:M601
1226 #define M601 PPC_OPCODE_601 macro
1300 { "dozi", OP(9), OP_MASK, POWER|M601, { RT, RA, SI } },
1906 { "rlmi", M(22,0), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } },
1907 { "rlmi.", M(22,1), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } },
2049 { "maskg", XRC(31,29,0), X_MASK, POWER|M601, { RA, RS, RB } },
2050 { "maskg.", XRC(31,29,1), X_MASK, POWER|M601, { RA, RS, RB } },
2114 { "mul", XO(31,107,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2115 { "mul.", XO(31,107,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2116 { "mulo", XO(31,107,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2117 { "mulo.", XO(31,107,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2158 { "slq", XRC(31,152,0), X_MASK, POWER|M601, { RA, RS, RB } },
2159 { "slq.", XRC(31,152,1), X_MASK, POWER|M601, { RA, RS, RB } },
2161 { "sle", XRC(31,153,0), X_MASK, POWER|M601, { RA, RS, RB } },
2162 { "sle.", XRC(31,153,1), X_MASK, POWER|M601, { RA, RS, RB } },
2169 { "sliq", XRC(31,184,0), X_MASK, POWER|M601, { RA, RS, SH } },
2170 { "sliq.", XRC(31,184,1), X_MASK, POWER|M601, { RA, RS, SH } },
2196 { "sllq", XRC(31,216,0), X_MASK, POWER|M601, { RA, RS, RB } },
2197 { "sllq.", XRC(31,216,1), X_MASK, POWER|M601, { RA, RS, RB } },
2199 { "sleq", XRC(31,217,0), X_MASK, POWER|M601, { RA, RS, RB } },
2200 { "sleq.", XRC(31,217,1), X_MASK, POWER|M601, { RA, RS, RB } },
2241 { "slliq", XRC(31,248,0), X_MASK, POWER|M601, { RA, RS, SH } },
2242 { "slliq.", XRC(31,248,1), X_MASK, POWER|M601, { RA, RS, SH } },
2244 { "doz", XO(31,264,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2245 { "doz.", XO(31,264,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2246 { "dozo", XO(31,264,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2247 { "dozo.", XO(31,264,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2258 { "lscbx", XRC(31,277,0), X_MASK, POWER|M601, { RT, RA, RB } },
2259 { "lscbx.", XRC(31,277,1), X_MASK, POWER|M601, { RT, RA, RB } },
2282 { "div", XO(31,331,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2283 { "div.", XO(31,331,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2284 { "divo", XO(31,331,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2285 { "divo.", XO(31,331,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2287 { "mfmq", XSPR(31,339,0), XSPR_MASK, POWER|M601, { RT } },
2291 { "mfdec", XSPR(31,339,6), XSPR_MASK, POWER|M601, { RT } },
2318 { "abs", XO(31,360,0,0), XORB_MASK, POWER|M601, { RT, RA } },
2319 { "abs.", XO(31,360,0,1), XORB_MASK, POWER|M601, { RT, RA } },
2320 { "abso", XO(31,360,1,0), XORB_MASK, POWER|M601, { RT, RA } },
2321 { "abso.", XO(31,360,1,1), XORB_MASK, POWER|M601, { RT, RA } },
2323 { "divs", XO(31,363,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2324 { "divs.", XO(31,363,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2325 { "divso", XO(31,363,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2326 { "divso.", XO(31,363,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2376 { "mtmq", XSPR(31,467,0), XSPR_MASK, POWER|M601, { RS } },
2406 { "nabs", XO(31,488,0,0), XORB_MASK, POWER|M601, { RT, RA } },
2407 { "nabs.", XO(31,488,0,1), XORB_MASK, POWER|M601, { RT, RA } },
2408 { "nabso", XO(31,488,1,0), XORB_MASK, POWER|M601, { RT, RA } },
2409 { "nabso.", XO(31,488,1,1), XORB_MASK, POWER|M601, { RT, RA } },
2427 { "clcs", X(31,531), XRB_MASK, POWER|M601, { RT, RA } },
2442 { "rrib", XRC(31,537,0), X_MASK, POWER|M601, { RA, RS, RB } },
2443 { "rrib.", XRC(31,537,1), X_MASK, POWER|M601, { RA, RS, RB } },
2448 { "maskir", XRC(31,541,0), X_MASK, POWER|M601, { RA, RS, RB } },
2449 { "maskir.", XRC(31,541,1), X_MASK, POWER|M601, { RA, RS, RB } },
2481 { "srq", XRC(31,664,0), X_MASK, POWER|M601, { RA, RS, RB } },
2482 { "srq.", XRC(31,664,1), X_MASK, POWER|M601, { RA, RS, RB } },
2484 { "sre", XRC(31,665,0), X_MASK, POWER|M601, { RA, RS, RB } },
2485 { "sre.", XRC(31,665,1), X_MASK, POWER|M601, { RA, RS, RB } },
2489 { "sriq", XRC(31,696,0), X_MASK, POWER|M601, { RA, RS, SH } },
2490 { "sriq.", XRC(31,696,1), X_MASK, POWER|M601, { RA, RS, SH } },
2497 { "srlq", XRC(31,728,0), X_MASK, POWER|M601, { RA, RS, RB } },
2498 { "srlq.", XRC(31,728,1), X_MASK, POWER|M601, { RA, RS, RB } },
2500 { "sreq", XRC(31,729,0), X_MASK, POWER|M601, { RA, RS, RB } },
2501 { "sreq.", XRC(31,729,1), X_MASK, POWER|M601, { RA, RS, RB } },
2505 { "srliq", XRC(31,760,0), X_MASK, POWER|M601, { RA, RS, SH } },
2506 { "srliq.", XRC(31,760,1), X_MASK, POWER|M601, { RA, RS, SH } },
2529 { "sraq", XRC(31,920,0), X_MASK, POWER|M601, { RA, RS, RB } },
2530 { "sraq.", XRC(31,920,1), X_MASK, POWER|M601, { RA, RS, RB } },
2532 { "srea", XRC(31,921,0), X_MASK, POWER|M601, { RA, RS, RB } },
2533 { "srea.", XRC(31,921,1), X_MASK, POWER|M601, { RA, RS, RB } },
2540 { "sraiq", XRC(31,952,0), X_MASK, POWER|M601, { RA, RS, SH } },
2541 { "sraiq.", XRC(31,952,1), X_MASK, POWER|M601, { RA, RS, SH } },