Lines Matching refs:r1
79 ldil L%REAL_MODE_PSW, %r1
80 ldo R%REAL_MODE_PSW(%r1), %r1
81 mtctl %r1, %cr22
84 ldil L%PA(1f),%r1
85 ldo R%PA(1f)(%r1),%r1
86 mtctl %r1, %cr18
87 ldo 4(%r1), %r1
88 mtctl %r1, %cr18
92 1: ldil L%PA(cache_info),%r1
93 ldo R%PA(cache_info)(%r1),%r1
97 LDREG ITLB_SID_BASE(%r1),%r20
98 LDREG ITLB_SID_STRIDE(%r1),%r21
99 LDREG ITLB_SID_COUNT(%r1),%r22
100 LDREG ITLB_OFF_BASE(%r1),%arg0
101 LDREG ITLB_OFF_STRIDE(%r1),%arg1
102 LDREG ITLB_OFF_COUNT(%r1),%arg2
103 LDREG ITLB_LOOP(%r1),%arg3
140 LDREG DTLB_SID_BASE(%r1),%r20
141 LDREG DTLB_SID_STRIDE(%r1),%r21
142 LDREG DTLB_SID_COUNT(%r1),%r22
143 LDREG DTLB_OFF_BASE(%r1),%arg0
144 LDREG DTLB_OFF_STRIDE(%r1),%arg1
145 LDREG DTLB_OFF_COUNT(%r1),%arg2
146 LDREG DTLB_LOOP(%r1),%arg3
184 ldil L%KERNEL_PSW, %r1
185 ldo R%KERNEL_PSW(%r1), %r1
186 or %r1,%r19,%r1 /* Set I bit if set on entry */
187 mtctl %r1, %cr22
190 ldil L%(2f), %r1
191 ldo R%(2f)(%r1), %r1
192 mtctl %r1, %cr18
193 ldo 4(%r1), %r1
194 mtctl %r1, %cr18
213 ldil L%cache_info,%r1
214 ldo R%cache_info(%r1),%r1
218 LDREG ICACHE_BASE(%r1),%arg0
219 LDREG ICACHE_STRIDE(%r1),%arg1
220 LDREG ICACHE_COUNT(%r1),%arg2
221 LDREG ICACHE_LOOP(%r1),%arg3
253 ldil L%cache_info,%r1
254 ldo R%cache_info(%r1),%r1
258 LDREG DCACHE_BASE(%r1),%arg0
259 LDREG DCACHE_STRIDE(%r1),%arg1
260 LDREG DCACHE_COUNT(%r1),%arg2
261 LDREG DCACHE_LOOP(%r1),%arg3
294 ldi 64,%r1
340 ADDIB> -1,%r1,1b
396 ldil L%(__PAGE_OFFSET),%r1
397 sub %r26,%r1,%r26
398 sub %r25,%r1,%r23 /* move physical addr into non shadowed reg */
422 ldi 64,%r1
468 ADDIB> -1,%r1,1b
502 ldi 64,%r1
521 ADDIB> -1,%r1,1b
537 ldil L%dcache_stride,%r1
538 ldw R%dcache_stride(%r1),%r23
581 ldil L%dcache_stride,%r1
582 ldw R%dcache_stride(%r1),%r23
646 ldil L%dcache_stride,%r1
647 ldw R%dcache_stride(%r1),%r23
690 ldil L%dcache_stride,%r1
691 ldw R%dcache_stride(%r1),%r23
712 ldil L%dcache_stride,%r1
713 ldw R%dcache_stride(%r1),%r23
735 ldil L%icache_stride,%r1
736 ldw R%icache_stride(%r1),%r23
757 ldil L%icache_stride,%r1
758 ldw R%icache_stride(%r1),%r23
801 ldil L%icache_stride,%r1
802 ldw R%icache_stride(%r1),%r23
837 ldil L%REAL_MODE_PSW, %r1
838 ldo R%REAL_MODE_PSW(%r1), %r1
839 mtctl %r1, %cr22
842 ldil L%PA(1f),%r1
843 ldo R%PA(1f)(%r1),%r1
844 mtctl %r1, %cr18
845 ldo 4(%r1), %r1
846 mtctl %r1, %cr18
889 ldil L%KERNEL_PSW, %r1
890 ldo R%KERNEL_PSW(%r1), %r1
891 mtctl %r1, %cr22
894 ldil L%(2f), %r1
895 ldo R%(2f)(%r1), %r1
896 mtctl %r1, %cr18
897 ldo 4(%r1), %r1
898 mtctl %r1, %cr18