26 	u32 offset, t;  in nile4_map_irq()  local
33 	t = ddb_in32(offset);  in nile4_map_irq()
34 	t &= ~(7 << (nile4_irq * 4));  in nile4_map_irq()
35 	t |= cpu_irq << (nile4_irq * 4);  in nile4_map_irq()
36 	ddb_out32(offset, t);  in nile4_map_irq()
41 	u32 all, t;  in nile4_map_irq_all()  local
47 	t = ddb_in32(DDB_INTCTRL);  in nile4_map_irq_all()
48 	t &= 0x88888888;  in nile4_map_irq_all()
49 	t |= all;  in nile4_map_irq_all()
50 	ddb_out32(DDB_INTCTRL, t);  in nile4_map_irq_all()
51 	t = ddb_in32(DDB_INTCTRL + 4);  in nile4_map_irq_all()
52 	t &= 0x88888888;  in nile4_map_irq_all()
53 	t |= all;  in nile4_map_irq_all()
54 	ddb_out32(DDB_INTCTRL + 4, t);  in nile4_map_irq_all()
59 	u32 offset, t;  in nile4_enable_irq()  local
66 	t = ddb_in32(offset);  in nile4_enable_irq()
67 	t |= 8 << (nile4_irq * 4);  in nile4_enable_irq()
68 	ddb_out32(offset, t);  in nile4_enable_irq()
73 	u32 offset, t;  in nile4_disable_irq()  local
80 	t = ddb_in32(offset);  in nile4_disable_irq()
81 	t &= ~(8 << (nile4_irq * 4));  in nile4_disable_irq()
82 	ddb_out32(offset, t);  in nile4_disable_irq()
98 	u32 t;  in nile4_enable_irq_output()  local
100 	t = ddb_in32(DDB_INTSTAT1 + 4);  in nile4_enable_irq_output()
101 	t |= 1 << (16 + cpu_irq);  in nile4_enable_irq_output()
102 	ddb_out32(DDB_INTSTAT1, t);  in nile4_enable_irq_output()
107 	u32 t;  in nile4_disable_irq_output()  local
109 	t = ddb_in32(DDB_INTSTAT1 + 4);  in nile4_disable_irq_output()
110 	t &= ~(1 << (16 + cpu_irq));  in nile4_disable_irq_output()
111 	ddb_out32(DDB_INTSTAT1, t);  in nile4_disable_irq_output()
116 	u32 t;  in nile4_set_pci_irq_polarity()  local
118 	t = ddb_in32(DDB_INTPPES);  in nile4_set_pci_irq_polarity()
120 		t &= ~(1 << (pci_irq * 2));  in nile4_set_pci_irq_polarity()
122 		t |= 1 << (pci_irq * 2);  in nile4_set_pci_irq_polarity()
123 	ddb_out32(DDB_INTPPES, t);  in nile4_set_pci_irq_polarity()
128 	u32 t;  in nile4_set_pci_irq_level_or_edge()  local
130 	t = ddb_in32(DDB_INTPPES);  in nile4_set_pci_irq_level_or_edge()
132 		t |= 2 << (pci_irq * 2);  in nile4_set_pci_irq_level_or_edge()
134 		t &= ~(2 << (pci_irq * 2));  in nile4_set_pci_irq_level_or_edge()
135 	ddb_out32(DDB_INTPPES, t);  in nile4_set_pci_irq_level_or_edge()