28 	u32 offset, t;  in nile4_map_irq()  local
35 	t = ddb_in32(offset);  in nile4_map_irq()
36 	t &= ~(7 << (nile4_irq * 4));  in nile4_map_irq()
37 	t |= cpu_irq << (nile4_irq * 4);  in nile4_map_irq()
38 	ddb_out32(offset, t);  in nile4_map_irq()
43 	u32 all, t;  in nile4_map_irq_all()  local
49 	t = ddb_in32(DDB_INTCTRL);  in nile4_map_irq_all()
50 	t &= 0x88888888;  in nile4_map_irq_all()
51 	t |= all;  in nile4_map_irq_all()
52 	ddb_out32(DDB_INTCTRL, t);  in nile4_map_irq_all()
53 	t = ddb_in32(DDB_INTCTRL + 4);  in nile4_map_irq_all()
54 	t &= 0x88888888;  in nile4_map_irq_all()
55 	t |= all;  in nile4_map_irq_all()
56 	ddb_out32(DDB_INTCTRL + 4, t);  in nile4_map_irq_all()
61 	u32 offset, t;  in nile4_enable_irq()  local
73 	t = ddb_in32(offset);  in nile4_enable_irq()
75 	t |= 8 << (nile4_irq * 4);  in nile4_enable_irq()
76 	ddb_out32(offset, t);  in nile4_enable_irq()
82 	u32 offset, t;  in nile4_disable_irq()  local
91 	t = ddb_in32(offset);  in nile4_disable_irq()
92 	t &= ~(8 << (nile4_irq * 4));  in nile4_disable_irq()
93 	ddb_out32(offset, t);  in nile4_disable_irq()
109 	u32 t;  in nile4_enable_irq_output()  local
111 	t = ddb_in32(DDB_INTSTAT1 + 4);  in nile4_enable_irq_output()
112 	t |= 1 << (16 + cpu_irq);  in nile4_enable_irq_output()
113 	ddb_out32(DDB_INTSTAT1, t);  in nile4_enable_irq_output()
118 	u32 t;  in nile4_disable_irq_output()  local
120 	t = ddb_in32(DDB_INTSTAT1 + 4);  in nile4_disable_irq_output()
121 	t &= ~(1 << (16 + cpu_irq));  in nile4_disable_irq_output()
122 	ddb_out32(DDB_INTSTAT1, t);  in nile4_disable_irq_output()
127 	u32 t;  in nile4_set_pci_irq_polarity()  local
129 	t = ddb_in32(DDB_INTPPES);  in nile4_set_pci_irq_polarity()
131 		t &= ~(1 << (pci_irq * 2));  in nile4_set_pci_irq_polarity()
133 		t |= 1 << (pci_irq * 2);  in nile4_set_pci_irq_polarity()
134 	ddb_out32(DDB_INTPPES, t);  in nile4_set_pci_irq_polarity()
139 	u32 t;  in nile4_set_pci_irq_level_or_edge()  local
141 	t = ddb_in32(DDB_INTPPES);  in nile4_set_pci_irq_level_or_edge()
143 		t |= 2 << (pci_irq * 2);  in nile4_set_pci_irq_level_or_edge()
145 		t &= ~(2 << (pci_irq * 2));  in nile4_set_pci_irq_level_or_edge()
146 	ddb_out32(DDB_INTPPES, t);  in nile4_set_pci_irq_level_or_edge()