Lines Matching refs:VIC_INT_IPL
370 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_II); in vic_init()
371 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT1); in vic_init()
372 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT2); in vic_init()
373 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT3); in vic_init()
374 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT4); in vic_init()
378 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT6); in vic_init()
380 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT7); in vic_init()
381 vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_DMA_INT); in vic_init()
382 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE| in vic_init()
384 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE| in vic_init()
386 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE| in vic_init()
388 vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE| in vic_init()
394 vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE| in vic_init()
396 vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE| in vic_init()
399 vic_outb(VIC_INT_IPL(3)| in vic_init()
404 vic_outb(VIC_INT_IPL(3)| in vic_init()
409 vic_outb(VIC_INT_IPL(6)| in vic_init()
455 vic_outb(VIC_INT_IPL(3)| in vic_start()