Lines Matching refs:load
3104 mov.l ADDR(%a6),%a0 # load <ea>
3147 lea _CASHI(%pc),%a1 # load end of CAS core code
3150 lea _CASLO(%pc),%a1 # load begin of CAS core code
3197 # (4) Use "plpaw" instruction to pre-load ATC with effective #
3204 # (6) Use "plpar" instruction to do a re-load of ATC entries for #
3872 movq.l &0x1,%d0 # load user data fc
3875 movq.l &0x5,%d0 # load supervisor data fc
3894 # load the SFC and DFC with the appropriate mode.
3896 movc %d0,%sfc # load new sfc
3897 movc %d0,%dfc # load new dfc
3899 # pre-load the operand ATC. no page faults should occur here because
3901 plpaw (%a1) # load atc for ADDR
3902 plpaw (%a2) # load atc for ADDR+1
3908 # load the BUSCR values.
3913 # pre-load the instruction cache for the following algorithm.
4052 # load the SFC and DFC with the appropriate mode.
4054 movc %d0,%sfc # load new sfc
4055 movc %d0,%dfc # load new dfc
4057 # pre-load the operand ATC. no page faults should occur here because
4059 plpaw (%a1) # load atc for ADDR
4060 plpaw (%a2) # load atc for ADDR+3
4066 # load the BUSCR values.
4198 # load the SFC and DFC with the appropriate mode.
4200 movc %d0,%sfc # load new sfc
4201 movc %d0,%dfc # load new dfc
4203 # pre-load the operand ATC. no page faults should occur here because
4205 plpaw (%a1) # load atc for ADDR
4206 plpaw (%a2) # load atc for ADDR+3
4212 # load the BUSCR values.
4217 # pre-load the instruction cache for the following algorithm.