Lines Matching refs:IO_STATE
178 #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
179 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
518 move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \
519 | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \
520 | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \
521 | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \
522 | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \
523 | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \
524 | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \
530 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
534 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
540 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
544 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
557 or.d IO_STATE (R_GEN_CONFIG, dma6, serial0),$r0
559 or.d IO_STATE (R_GEN_CONFIG, dma7, serial0) \
560 | IO_STATE (R_GEN_CONFIG, dma6, serial0),$r0
567 or.d IO_STATE (R_GEN_CONFIG, dma8, serial1),$r0
569 or.d IO_STATE (R_GEN_CONFIG, dma9, serial1) \
570 | IO_STATE (R_GEN_CONFIG, dma8, serial1),$r0
575 or.d IO_STATE (R_GEN_CONFIG, dma7, intdma6) \
576 | IO_STATE (R_GEN_CONFIG, dma6, intdma7),$r0
580 or.w IO_STATE (R_GEN_CONFIG, ser2, select),$r0
585 or.d IO_STATE (R_GEN_CONFIG, dma2, serial2),$r0
587 or.d IO_STATE (R_GEN_CONFIG, dma3, serial2) \
588 | IO_STATE (R_GEN_CONFIG, dma2, serial2),$r0
594 or.w IO_STATE (R_GEN_CONFIG, ser3, select),$r0
599 or.d IO_STATE (R_GEN_CONFIG, dma4, serial3),$r0
601 or.d IO_STATE (R_GEN_CONFIG, dma5, serial3) \
602 | IO_STATE (R_GEN_CONFIG, dma4, serial3),$r0
608 or.w IO_STATE (R_GEN_CONFIG, par0, select),$r0
612 or.w IO_STATE (R_GEN_CONFIG, par1, select),$r0
616 or.d IO_STATE (R_GEN_CONFIG, dma3, ata) \
617 | IO_STATE (R_GEN_CONFIG, dma2, ata) \
618 | IO_STATE (R_GEN_CONFIG, ata, select),$r0
623 or.d IO_STATE (R_GEN_CONFIG, usb1, select),$r0
627 or.d IO_STATE (R_GEN_CONFIG, usb2, select),$r0
633 | IO_STATE (R_GEN_CONFIG, dma9, usb) \
634 | IO_STATE (R_GEN_CONFIG, dma8, usb),$r0
639 or.d IO_STATE (R_GEN_CONFIG, dma5, extdma0) \
640 | IO_STATE (R_GEN_CONFIG, dma4, extdma0),$r0
644 or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0
668 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
673 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
678 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
687 or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
707 or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0
746 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
747 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
752 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
753 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
757 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
758 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
759 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
760 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
761 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
762 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
763 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
764 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
769 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
770 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
771 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
772 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
773 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
774 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
775 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
780 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
781 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
786 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
787 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
791 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
792 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
793 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
794 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
795 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
796 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
797 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
798 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
803 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
804 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
805 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
806 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
807 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
808 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
809 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
816 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
817 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
822 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
823 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
827 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
828 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
829 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
830 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
831 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
832 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
833 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
834 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
839 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
840 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
841 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
842 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
843 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
844 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
845 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0