Lines Matching refs:TSUNAMI_cchip
260 TSUNAMI_cchip->misc.csr |= (1L << 28); /* clear NXM... */ in tsunami_probe_write()
264 if (TSUNAMI_cchip->misc.csr & (1L << 28)) { in tsunami_probe_write()
265 int source = (TSUNAMI_cchip->misc.csr >> 29) & 7; in tsunami_probe_write()
266 TSUNAMI_cchip->misc.csr |= (1L << 28); /* ...and unlock NXS. */ in tsunami_probe_write()
401 tmp = (unsigned long)(TSUNAMI_cchip - 1); in tsunami_init_arch()
410 printk("%s: CSR_CSC 0x%lx\n", FN, TSUNAMI_cchip->csc.csr); in tsunami_init_arch()
411 printk("%s: CSR_MTR 0x%lx\n", FN, TSUNAMI_cchip.mtr.csr); in tsunami_init_arch()
412 printk("%s: CSR_MISC 0x%lx\n", FN, TSUNAMI_cchip->misc.csr); in tsunami_init_arch()
413 printk("%s: CSR_DIM0 0x%lx\n", FN, TSUNAMI_cchip->dim0.csr); in tsunami_init_arch()
414 printk("%s: CSR_DIM1 0x%lx\n", FN, TSUNAMI_cchip->dim1.csr); in tsunami_init_arch()
415 printk("%s: CSR_DIR0 0x%lx\n", FN, TSUNAMI_cchip->dir0.csr); in tsunami_init_arch()
416 printk("%s: CSR_DIR1 0x%lx\n", FN, TSUNAMI_cchip->dir1.csr); in tsunami_init_arch()
417 printk("%s: CSR_DRIR 0x%lx\n", FN, TSUNAMI_cchip->drir.csr); in tsunami_init_arch()
432 if (TSUNAMI_cchip->csc.csr & 1L<<14) in tsunami_init_arch()
460 if (TSUNAMI_cchip->csc.csr & 1L<<14) in tsunami_kill_arch()
479 if (TSUNAMI_cchip->csc.csr & 1L<<14) in tsunami_pci_clr_err()