Lines Matching refs:SIZE_OF_CHAR
39 # define CHAR_PER_VEC (VEC_SIZE / SIZE_OF_CHAR)
52 # define SIZE_OF_CHAR 4 macro
61 # define SIZE_OF_CHAR 1 macro
315 movl (%rdi, %rcx, SIZE_OF_CHAR), %edx
317 cmpl (%rsi, %rcx, SIZE_OF_CHAR), %edx
384 movl VEC_SIZE(%rdi, %rcx, SIZE_OF_CHAR), %edx
386 cmpl VEC_SIZE(%rsi, %rcx, SIZE_OF_CHAR), %edx
423 movl (VEC_SIZE * 2)(%rdi, %rcx, SIZE_OF_CHAR), %edx
425 cmpl (VEC_SIZE * 2)(%rsi, %rcx, SIZE_OF_CHAR), %edx
445 movl (VEC_SIZE * 3)(%rdi, %rcx, SIZE_OF_CHAR), %edx
447 cmpl (VEC_SIZE * 3)(%rsi, %rcx, SIZE_OF_CHAR), %edx
662 movl (VEC_SIZE * 2)(%rdi, %LOOP_REG64, SIZE_OF_CHAR), %ecx
664 cmpl (VEC_SIZE * 2)(%rsi, %LOOP_REG64, SIZE_OF_CHAR), %ecx
714 movl (%rdi, %rcx, SIZE_OF_CHAR), %edx
716 cmpl (%rsi, %rcx, SIZE_OF_CHAR), %edx
742 movl VEC_SIZE(%rdi, %rcx, SIZE_OF_CHAR), %edx
744 cmpl VEC_SIZE(%rsi, %rcx, SIZE_OF_CHAR), %edx
849 leal -VEC_SIZE(%OFFSET_REG64, %rcx, SIZE_OF_CHAR), %ecx
879 leal -VEC_SIZE(%rax, %rcx, SIZE_OF_CHAR), %ecx
985 leal -VEC_SIZE(%rax, %rcx, SIZE_OF_CHAR), %ecx
1068 VMOVU (%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %YMM0
1070 CMP_R1_S2_YMM (%YMM0, (%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %YMM1, %k1){%k2}
1092 VMOVU (%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %YMM0
1094 CMP_R1_S2_YMM (%YMM0, (%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %YMM1, %k1){%k2}
1119 movl (%rdi, %rcx, SIZE_OF_CHAR), %edx
1121 cmpl (%rsi, %rcx, SIZE_OF_CHAR), %edx
1127 movzbl (%rdi, %rcx, SIZE_OF_CHAR), %eax
1128 movzbl (%rsi, %rcx, SIZE_OF_CHAR), %ecx
1184 cmpl $(16 / SIZE_OF_CHAR), %eax
1198 movl $(16 / SIZE_OF_CHAR), %OFFSET_REG
1208 vmovdqu (%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %xmm0
1210 CMP_R1_S2_XMM (%xmm0, (%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %xmm1, %k1){%k2}
1219 addl $(16 / SIZE_OF_CHAR), %OFFSET_REG
1224 leaq -(VEC_SIZE * 4)(%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %rdi
1225 leaq -(VEC_SIZE * 4)(%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %rsi
1227 leaq (16 - VEC_SIZE * 4)(%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %rdi
1228 leaq (16 - VEC_SIZE * 4)(%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %rsi
1242 cmpl $(24 / SIZE_OF_CHAR), %eax
1260 cmpq $(8 / SIZE_OF_CHAR), %rdx
1263 movl $(24 / SIZE_OF_CHAR), %OFFSET_REG
1266 vmovq (%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %xmm0
1267 vmovq (%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %xmm1
1280 addl $(8 / SIZE_OF_CHAR), %OFFSET_REG
1285 leaq -(VEC_SIZE * 4)(%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %rdi
1286 leaq -(VEC_SIZE * 4)(%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %rsi
1288 leaq (8 - VEC_SIZE * 4)(%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %rdi
1289 leaq (8 - VEC_SIZE * 4)(%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %rsi
1338 movl $(28 / SIZE_OF_CHAR), %OFFSET_REG
1341 vmovd (%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %xmm0
1342 vmovd (%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %xmm1
1349 addl $(4 / SIZE_OF_CHAR), %OFFSET_REG
1354 leaq -(VEC_SIZE * 4)(%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %rdi
1355 leaq -(VEC_SIZE * 4)(%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %rsi
1357 leaq (4 - VEC_SIZE * 4)(%rdi, %OFFSET_REG64, SIZE_OF_CHAR), %rdi
1358 leaq (4 - VEC_SIZE * 4)(%rsi, %OFFSET_REG64, SIZE_OF_CHAR), %rsi