90     reg_data: u8,
91     reg_interrupt_enable: u8,
92     reg_ii_fifo: u8, // 	Interrupt Identification and FIFO control registers
93     reg_line_config: u8,
94     reg_modem_config: u8,
95     reg_line_status: u8,
96     reg_modem_statue: u8,
97     reg_scartch: u8,
293             io_out8(port + 0, (divisor & 0xff) as u8); // Set divisor  (lo byte)  in uart_init()
294             io_out8(port + 1, ((divisor >> 8) & 0xff) as u8); //                  (hi byte)  in uart_init()
374 pub extern "C" fn c_uart_send(port: u16, c: u8) {  in c_uart_send()  argument
385 pub extern "C" fn c_uart_read(port: u16) -> u8 {  in c_uart_read()  argument
394 pub extern "C" fn c_uart_send_str(port: u16, s: *const u8) {  in c_uart_send_str()  argument
397         while *offset(s, i) != '\0' as u8 {  in c_uart_send_str()
422         io_out8(port + 0, (divisor & 0xff) as u8); // Set divisor  (lo byte)  in c_uart_init()
423 …     io_out8(port + 1, ((divisor >> 8) & 0xff) as u8); //                  CompatibleTable(hi byte)  in c_uart_init()