Lines Matching refs:u8
11 pub const ATA_CMD_READ_DMA_EXT: u8 = 0x25; // 读操作，并且退出
12 pub const ATA_CMD_WRITE_DMA_EXT: u8 = 0x35; // 写操作，并且退出
14 pub const ATA_CMD_IDENTIFY: u8 = 0xEC;
16 pub const ATA_CMD_IDENTIFY_PACKET: u8 = 0xA1;
18 pub const ATA_CMD_PACKET: u8 = 0xA0;
19 pub const ATA_DEV_BUSY: u8 = 0x80;
20 pub const ATA_DEV_DRQ: u8 = 0x08;
81 pub _rsv: [u8; 116], // 0x2C - 0x9F, Reserved
82 pub vendor: [u8; 96], // 0xA0 - 0xFF, Vendor specific registers
100 pub cfis: [u8; 64], // Command FIS
102 pub acmd: [u8; 16], // ATAPI command, 12 or 16 bytes
104 _rsv: [u8; 48], // Reserved
115 pub cfl: u8,
117 pub _pm: u8, // Reset - 0x80, bist: 0x40, clear busy on ok: 0x20, port multiplier
249 #[repr(u8)]
273 pub fis_type: u8, // FIS_TYPE_REG_H2D
275 pub pm: u8, // Port multiplier, 1: Command, 0: Control
279 pub command: u8, // Command register
280 pub featurel: u8, // Feature register, 7:0
283 pub lba0: u8, // LBA low register, 7:0
284 pub lba1: u8, // LBA mid register, 15:8
285 pub lba2: u8, // LBA high register, 23:16
286 pub device: u8, // Device register
289 pub lba3: u8, // LBA register, 31:24
290 pub lba4: u8, // LBA register, 39:32
291 pub lba5: u8, // LBA register, 47:40
292 pub featureh: u8, // Feature register, 15:8
295 pub countl: u8, // Count register, 7:0
296 pub counth: u8, // Count register, 15:8
297 pub icc: u8, // Isochronous command completion
298 pub control: u8, // Control register
301 pub rsv1: [u8; 4], // Reserved
308 pub fis_type: u8, // FIS_TYPE_REG_D2H
310 pub pm: u8, // Port multiplier, Interrupt bit: 2
312 pub status: u8, // Status register
313 pub error: u8, // Error register
316 pub lba0: u8, // LBA low register, 7:0
317 pub lba1: u8, // LBA mid register, 15:8
318 pub lba2: u8, // LBA high register, 23:16
319 pub device: u8, // Device register
322 pub lba3: u8, // LBA register, 31:24
323 pub lba4: u8, // LBA register, 39:32
324 pub lba5: u8, // LBA register, 47:40
325 pub rsv2: u8, // Reserved
328 pub countl: u8, // Count register, 7:0
329 pub counth: u8, // Count register, 15:8
330 pub rsv3: [u8; 2], // Reserved
333 pub rsv4: [u8; 4], // Reserved
340 pub fis_type: u8, // FIS_TYPE_DATA
342 pub pm: u8, // Port multiplier
344 pub rsv1: [u8; 2], // Reserved
347 pub data: [u8; 252], // Payload
354 pub fis_type: u8, // FIS_TYPE_PIO_SETUP
356 pub pm: u8, // Port multiplier, direction: 4 - device to host, interrupt: 2
358 pub status: u8, // Status register
359 pub error: u8, // Error register
362 pub lba0: u8, // LBA low register, 7:0
363 pub lba1: u8, // LBA mid register, 15:8
364 pub lba2: u8, // LBA high register, 23:16
365 pub device: u8, // Device register
368 pub lba3: u8, // LBA register, 31:24
369 pub lba4: u8, // LBA register, 39:32
370 pub lba5: u8, // LBA register, 47:40
371 pub rsv2: u8, // Reserved
374 pub countl: u8, // Count register, 7:0
375 pub counth: u8, // Count register, 15:8
376 pub rsv3: u8, // Reserved
377 pub e_status: u8, // New value of status register
381 pub rsv4: [u8; 2], // Reserved
388 pub fis_type: u8, // FIS_TYPE_DMA_SETUP
390 pub pm: u8, // Port multiplier, direction: 4 - device to host, interrupt: 2, auto-activate: 1
392 pub rsv1: [u8; 2], // Reserved