314             &common_header.bus_device_function,  in set_command()
345     pub bus_device_function: BusDeviceFunction,  field
401             bus_device_function: self.common_header.bus_device_function,  in capabilities()
407         match pci_bar_init(common_header.bus_device_function) {  in bar_init()
576     fn cam_offset(&self, bus_device_function: BusDeviceFunction, register_offset: u16) -> u32 {  in cam_offset()
577         assert!(bus_device_function.valid());  in cam_offset()
578         let bdf = ((bus_device_function.bus - self.bus_begin) as u32) << 8  in cam_offset()
579             | (bus_device_function.device as u32) << 3  in cam_offset()
580             | bus_device_function.function as u32;  in cam_offset()
590     pub fn read_config(&self, bus_device_function: BusDeviceFunction, register_offset: u16) -> u32 {  in read_config()
591         let address = self.cam_offset(bus_device_function, register_offset);  in read_config()
604         bus_device_function: BusDeviceFunction,  in write_config()
608         let address = self.cam_offset(bus_device_function, register_offset);  in write_config()
619         bus_device_function: BusDeviceFunction,  in external_capabilities()
623             bus_device_function,  in external_capabilities()
632 pub fn capabilities_offset(bus_device_function: BusDeviceFunction) -> Option<u8> {  in capabilities_offset()
633     let result = PciArch::read_config(&bus_device_function, STATUS_COMMAND_OFFSET);  in capabilities_offset()
636         let cap_pointer = PciArch::read_config(&bus_device_function, 0x34) as u8 & 0xFC;  in capabilities_offset()
648     bus_device_function: BusDeviceFunction,  in pci_read_header()
652     let result = PciArch::read_config(&bus_device_function, 0x00);  in pci_read_header()
656     let result = PciArch::read_config(&bus_device_function, 0x04);  in pci_read_header()
660     let result = PciArch::read_config(&bus_device_function, 0x08);  in pci_read_header()
666     let result = PciArch::read_config(&bus_device_function, 0x0c);  in pci_read_header()
679         bus_device_function,  in pci_read_header()
695             let general_device = pci_read_general_device_header(header, &bus_device_function);  in pci_read_header()
704             let pci_to_pci_bridge = pci_read_pci_to_pci_bridge_header(header, &bus_device_function);  in pci_read_header()
714                 pci_read_pci_to_cardbus_bridge_header(header, &bus_device_function);  in pci_read_header()
733     bus_device_function: &BusDeviceFunction,  in pci_read_general_device_header()
736     let cardbus_cis_pointer = PciArch::read_config(bus_device_function, 0x28);  in pci_read_general_device_header()
738     let result = PciArch::read_config(bus_device_function, 0x2c);  in pci_read_general_device_header()
742     let expansion_rom_base_address = PciArch::read_config(bus_device_function, 0x30);  in pci_read_general_device_header()
744     let result = PciArch::read_config(bus_device_function, 0x34);  in pci_read_general_device_header()
749     let reserved2 = PciArch::read_config(bus_device_function, 0x38);  in pci_read_general_device_header()
751     let result = PciArch::read_config(bus_device_function, 0x3c);  in pci_read_general_device_header()
781     bus_device_function: &BusDeviceFunction,  in pci_read_pci_to_pci_bridge_header()
783     let bar0 = PciArch::read_config(bus_device_function, 0x10);  in pci_read_pci_to_pci_bridge_header()
784     let bar1 = PciArch::read_config(bus_device_function, 0x14);  in pci_read_pci_to_pci_bridge_header()
786     let result = PciArch::read_config(bus_device_function, 0x18);  in pci_read_pci_to_pci_bridge_header()
793     let result = PciArch::read_config(bus_device_function, 0x1c);  in pci_read_pci_to_pci_bridge_header()
798     let result = PciArch::read_config(bus_device_function, 0x20);  in pci_read_pci_to_pci_bridge_header()
802     let result = PciArch::read_config(bus_device_function, 0x24);  in pci_read_pci_to_pci_bridge_header()
806     let prefetchable_base_upper_32_bits = PciArch::read_config(bus_device_function, 0x28);  in pci_read_pci_to_pci_bridge_header()
807     let prefetchable_limit_upper_32_bits = PciArch::read_config(bus_device_function, 0x2c);  in pci_read_pci_to_pci_bridge_header()
809     let result = PciArch::read_config(bus_device_function, 0x30);  in pci_read_pci_to_pci_bridge_header()
813     let result = PciArch::read_config(bus_device_function, 0x34);  in pci_read_pci_to_pci_bridge_header()
818     let expansion_rom_base_address = PciArch::read_config(bus_device_function, 0x38);  in pci_read_pci_to_pci_bridge_header()
820     let result = PciArch::read_config(bus_device_function, 0x3c);  in pci_read_pci_to_pci_bridge_header()
1048 …lities_pointer,common_header.vendor_id, common_header.device_id,common_header.bus_device_function);  in pci_init()
1279     bus_device_function: BusDeviceFunction,  in pci_bar_init()
1289         let bar_orig = PciArch::read_config(&bus_device_function, BAR0_OFFSET + 4 * bar_index);  in pci_bar_init()
1291             &bus_device_function,  in pci_bar_init()
1295         let size_mask = PciArch::read_config(&bus_device_function, BAR0_OFFSET + 4 * bar_index);  in pci_bar_init()
1301         PciArch::write_config(&bus_device_function, BAR0_OFFSET + 4 * bar_index, bar_orig);  in pci_bar_init()
1319                     PciArch::read_config(&bus_device_function, BAR0_OFFSET + 4 * (bar_index + 1));  in pci_bar_init()
1393     pub bus_device_function: BusDeviceFunction,  field
1403         let capability_header = PciArch::read_config(&self.bus_device_function, offset);  in next()
1442     pub bus_device_function: BusDeviceFunction,  field
1451         let capability_header = self.root.read_config(self.bus_device_function, offset);  in next()