71     list: RwLock<LinkedList<Box<dyn PciDeviceStructure>>>,
83     pub fn read(&self) -> RwLockReadGuard<LinkedList<Box<dyn PciDeviceStructure>>> {  in read()  argument
88     pub fn write(&self) -> RwLockWriteGuard<LinkedList<Box<dyn PciDeviceStructure>>> {  in write()  argument
98     pub fn add(&self, device: Box<dyn PciDeviceStructure>) {  in add()  argument
110     list: &'a mut RwLockWriteGuard<'_, LinkedList<Box<dyn PciDeviceStructure>>>,  in get_pci_device_structure_mut()  argument
113 ) -> Vec<&'a mut Box<(dyn PciDeviceStructure)>> {  in get_pci_device_structure_mut()  argument
129     list: &'a mut RwLockReadGuard<'_, LinkedList<Box<dyn PciDeviceStructure>>>,  in get_pci_device_structure()  argument
132 ) -> Vec<&'a Box<(dyn PciDeviceStructure)>> {  in get_pci_device_structure()  argument
264 pub trait PciDeviceStructure: Send + Sync {  interface
382 impl PciDeviceStructure for PciDeviceStructureGeneralDevice {
445 impl PciDeviceStructure for PciDeviceStructurePciToPciBridge {
490 impl PciDeviceStructure for PciDeviceStructurePciToCardbusBridge {
650 ) -> Result<Box<dyn PciDeviceStructure>, PciError> {  in pci_read_header()  argument