Lines Matching refs:slot

40 uint32_t pci_read_config(uchar bus, uchar slot, uchar func, uchar offset)  in pci_read_config()  argument
43 uint lslot = (uint)slot; in pci_read_config()
64 uint pci_write_config(uchar bus, uchar slot, uchar func, uchar offset, uint32_t data) in pci_write_config() argument
67 uint lslot = (uint)slot; in pci_write_config()
88 …ice_header(struct pci_device_structure_general_device_t *header, uchar bus, uchar slot, uchar func) in pci_read_general_device_header() argument
91 header->BAR0 = pci_read_config(bus, slot, func, 0x10); in pci_read_general_device_header()
92 header->BAR1 = pci_read_config(bus, slot, func, 0x14); in pci_read_general_device_header()
93 header->BAR2 = pci_read_config(bus, slot, func, 0x18); in pci_read_general_device_header()
94 header->BAR3 = pci_read_config(bus, slot, func, 0x1c); in pci_read_general_device_header()
95 header->BAR4 = pci_read_config(bus, slot, func, 0x20); in pci_read_general_device_header()
96 header->BAR5 = pci_read_config(bus, slot, func, 0x24); in pci_read_general_device_header()
97 header->Cardbus_CIS_Pointer = pci_read_config(bus, slot, func, 0x28); in pci_read_general_device_header()
99 tmp32 = pci_read_config(bus, slot, func, 0x2c); in pci_read_general_device_header()
103 header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x30); in pci_read_general_device_header()
105 tmp32 = pci_read_config(bus, slot, func, 0x34); in pci_read_general_device_header()
110 header->reserved2 = pci_read_config(bus, slot, func, 0x38); in pci_read_general_device_header()
112 tmp32 = pci_read_config(bus, slot, func, 0x3c); in pci_read_general_device_header()
127 …_header(struct pci_device_structure_pci_to_pci_bridge_t *header, uchar bus, uchar slot, uchar func) in pci_read_pci_to_pci_bridge_header() argument
130 header->BAR0 = pci_read_config(bus, slot, func, 0x10); in pci_read_pci_to_pci_bridge_header()
131 header->BAR1 = pci_read_config(bus, slot, func, 0x14); in pci_read_pci_to_pci_bridge_header()
133 tmp32 = pci_read_config(bus, slot, func, 0x18); in pci_read_pci_to_pci_bridge_header()
140 tmp32 = pci_read_config(bus, slot, func, 0x1c); in pci_read_pci_to_pci_bridge_header()
145 tmp32 = pci_read_config(bus, slot, func, 0x20); in pci_read_pci_to_pci_bridge_header()
149 tmp32 = pci_read_config(bus, slot, func, 0x24); in pci_read_pci_to_pci_bridge_header()
153 header->Prefetchable_Base_Upper_32_Bits = pci_read_config(bus, slot, func, 0x28); in pci_read_pci_to_pci_bridge_header()
154 header->Prefetchable_Limit_Upper_32_Bits = pci_read_config(bus, slot, func, 0x2c); in pci_read_pci_to_pci_bridge_header()
156 tmp32 = pci_read_config(bus, slot, func, 0x30); in pci_read_pci_to_pci_bridge_header()
160 tmp32 = pci_read_config(bus, slot, func, 0x34); in pci_read_pci_to_pci_bridge_header()
165 header->Expansion_ROM_base_address = pci_read_config(bus, slot, func, 0x38); in pci_read_pci_to_pci_bridge_header()
167 tmp32 = pci_read_config(bus, slot, func, 0x3c); in pci_read_pci_to_pci_bridge_header()
181 …der(struct pci_device_structure_pci_to_cardbus_bridge_t *header, uchar bus, uchar slot, uchar func) in pci_read_pci_to_cardbus_bridge_header() argument
185 header->CardBus_Socket_ExCa_base_address = pci_read_config(bus, slot, func, 0x10); in pci_read_pci_to_cardbus_bridge_header()
187 tmp32 = pci_read_config(bus, slot, func, 0x14); in pci_read_pci_to_cardbus_bridge_header()
192 tmp32 = pci_read_config(bus, slot, func, 0x18); in pci_read_pci_to_cardbus_bridge_header()
198 header->Memory_Base_Address0 = pci_read_config(bus, slot, func, 0x1c); in pci_read_pci_to_cardbus_bridge_header()
199 header->Memory_Limit0 = pci_read_config(bus, slot, func, 0x20); in pci_read_pci_to_cardbus_bridge_header()
200 header->Memory_Base_Address1 = pci_read_config(bus, slot, func, 0x24); in pci_read_pci_to_cardbus_bridge_header()
201 header->Memory_Limit1 = pci_read_config(bus, slot, func, 0x28); in pci_read_pci_to_cardbus_bridge_header()
203 header->IO_Base_Address0 = pci_read_config(bus, slot, func, 0x2c); in pci_read_pci_to_cardbus_bridge_header()
204 header->IO_Limit0 = pci_read_config(bus, slot, func, 0x30); in pci_read_pci_to_cardbus_bridge_header()
205 header->IO_Base_Address1 = pci_read_config(bus, slot, func, 0x34); in pci_read_pci_to_cardbus_bridge_header()
206 header->IO_Limit1 = pci_read_config(bus, slot, func, 0x38); in pci_read_pci_to_cardbus_bridge_header()
208 tmp32 = pci_read_config(bus, slot, func, 0x3c); in pci_read_pci_to_cardbus_bridge_header()
213 tmp32 = pci_read_config(bus, slot, func, 0x40); in pci_read_pci_to_cardbus_bridge_header()
217 header->PC_Card_legacy_mode_base_address_16_bit = pci_read_config(bus, slot, func, 0x44); in pci_read_pci_to_cardbus_bridge_header()
230 void *pci_read_header(int *type, uchar bus, uchar slot, uchar func, bool add_to_list) in pci_read_header() argument
234 common_header->device = slot; in pci_read_header()
239 tmp32 = pci_read_config(bus, slot, func, 0x0); in pci_read_header()
243 tmp32 = pci_read_config(bus, slot, func, 0x4); in pci_read_header()
247 tmp32 = pci_read_config(bus, slot, func, 0x8); in pci_read_header()
253 tmp32 = pci_read_config(bus, slot, func, 0xc); in pci_read_header()
273 …i_read_general_device_header((struct pci_device_structure_general_device_t *)ret, bus, slot, func); in pci_read_header()
282 …_pci_to_pci_bridge_header((struct pci_device_structure_pci_to_pci_bridge_t *)ret, bus, slot, func); in pci_read_header()
291 …cardbus_bridge_header((struct pci_device_structure_pci_to_cardbus_bridge_t *)ret, bus, slot, func); in pci_read_header()