64     reg_data: u8,
65     reg_interrupt_enable: u8,
66     reg_ii_fifo: u8,    // 	Interrupt Identification and FIFO control registers
67     reg_line_config: u8,
68     reg_modem_config: u8,
69     reg_line_status: u8,
70     reg_modem_statue: u8,
71     reg_scartch: u8,
106             io_out8(port + 0, (divisor & 0xff) as u8);        // Set divisor  (lo byte)  in uart_init()
107             io_out8(port + 1, ((divisor >> 8) & 0xff) as u8); //                  (hi byte)  in uart_init()
181 pub extern "C" fn c_uart_send(port: u16, c: u8) {  in c_uart_send()  argument
190 pub extern "C" fn c_uart_read(port: u16) -> u8 {  in c_uart_read()  argument
199 pub extern "C" fn c_uart_send_str(port: u16, str: *const u8)  in c_uart_send_str()  argument
203         while *offset(str, i) != '\0' as u8 {  in c_uart_send_str()
228         io_out8(port + 0, (divisor & 0xff) as u8);        // Set divisor  (lo byte)  in c_uart_init()
229         io_out8(port + 1, ((divisor >> 8) & 0xff) as u8); //                  (hi byte)  in c_uart_init()