Lines Matching refs:uint32_t
26 uint32_t msix_offset; // msix表的offset
62 uint32_t BAR0;
63 uint32_t BAR1;
64 uint32_t BAR2;
65 uint32_t BAR3;
66 uint32_t BAR4;
67 uint32_t BAR5;
68 uint32_t Cardbus_CIS_Pointer; // 指向卡信息结构，供在 CardBus 和 PCI 之间共享芯片的设备使用。
73 uint32_t Expansion_ROM_base_address;
79 uint32_t reserved2;
95 uint32_t BAR0;
96 uint32_t BAR1;
113 uint32_t Prefetchable_Base_Upper_32_Bits;
114 uint32_t Prefetchable_Limit_Upper_32_Bits;
123 uint32_t Expansion_ROM_base_address;
139 uint32_t CardBus_Socket_ExCa_base_address;
150 uint32_t Memory_Base_Address0;
151 uint32_t Memory_Limit0;
152 uint32_t Memory_Base_Address1;
153 uint32_t Memory_Limit1;
154 uint32_t IO_Base_Address0;
155 uint32_t IO_Limit0;
156 uint32_t IO_Base_Address1;
157 uint32_t IO_Limit1;
166 uint32_t PC_Card_legacy_mode_base_address_16_bit;
179 uint32_t pci_read_config(uchar bus, uchar slot, uchar func, uchar offset);
190 uint pci_write_config(uchar bus, uchar slot, uchar func, uchar offset, uint32_t data);
216 …t class_code, uint8_t sub_class, struct pci_device_structure_header_t *res[], uint32_t *count_res);
225 int32_t pci_enumerate_capability_list(struct pci_device_structure_header_t *pci_dev, uint32_t cap_t…